LSI Specification | MB86617A |
7.18. Data Bridge Transmit Information Setting Register 4 [B]
Data bridge transmit information setting register 4 [B] is the register that sets CIP header range, transmit channel and speed added to transmit packet processed by
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| R/W |
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| Bit | Bit |
| Bit | Bit | Bit |
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| Bit | Bit | Bit | Bit | Bit | ||
| 15 |
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| 11 | 10 | 9 | 8 |
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| 4 | 3 | 2 | 1 | 0 | |||||
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3Ah |
| R/W |
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| Tx |
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| Tx |
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| Tx | - | ||||||
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| TSF- |
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| B |
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Initial Value |
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| “00” h |
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| ‘0’ |
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| “00” h |
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| “00” b | ‘0’ | ||||||||
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| Function |
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| Write in FMT range of transmit CIP header. |
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| 15 - 10 |
| Tx FMT |
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| (MSB: bit15, LSB: bit10) |
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| DSS at transmit: “100001” b |
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| 9 |
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| Tx |
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| Read/ |
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| Write in TSF range of transmit CIP header. |
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| 8 - 3 |
| Tx |
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| Read/ |
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| Write in channel range of transmit Isochronous packet header. |
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| Write |
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| (MSB: bit8, LSB: bit3) |
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| Write in transmit packet speed. |
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| Read/ |
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| (MSB: bit2, LSB: bit1) |
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| 2 - 1 |
| Tx |
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| s100 at transmit: “00” b |
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| s200 at transmit: “01” b |
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| s400 at transmit: “10” b |
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| Read |
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| Always indicates ‘0’. |
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| 0 |
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| reserved |
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| Write |
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| Always writes in ‘0’. |
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Rev.1.0 | 51 | Fujitsu VLSI |
