LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
51
Data bridge transmit information setting register 4 [B] is the register that sets CIP header range, transmit channel and speed added to transmit
packet processed by bridge-Bch.
AD R/W Bit
15 Bit
14 Bit
13 Bit
12 Bit
11 Bit
10 Bit
9 Bit
8 Bit
7 Bit
6 Bit
5 Bit
4 Bit
3 Bit
2 Bit
1 Bit
0
3Ah R/W Tx FMT-B Tx
TSF-
B Tx channel-B Tx speed-B -
Initial Value “00” h ‘0’ “00” h “00” b ‘0’
BIT Bit Name Action Value Function
15 - 10 Tx FMT-B Read/
Write -
Write in FMT range of transmit CIP header.
(MSB: bit15, LSB: bit10)
MPEG2-TS at transmit: “100000” b
DSS at transmit: “100001” b
9 Tx TSF-B Read/
Write - Write in TSF range of transmit CIP header.
8 - 3 Tx channel-B Read/
Write - Write in channel range of transmit Isochronous packet header.
(MSB: bit8, LSB: bit3)
2 - 1 Tx speed-B Read/
Write -
Write in transmit packet speed.
(MSB: bit2, LSB: bit1)
s100 at transmit: “00” b
s200 at transmit: “01” b
s400 at transmit: “10” b
Read - Always indicates ‘0’.
0 reserved
Write - Always writes in ‘0’.