Fujitsu MB86617A manual Data Bridge Transmit/Receive Status Register a, Brg

LSI Specification MB86617A

7.28. Data Bridge Transmit/Receive Status Register [A]

Data bridge transmit/receive status register indicates status of packet to be transmitted/received by bridge-Ach.

AD

R/W

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Tx

Rx

Rx

Rx

Rx o/e

Rx

Tx

Rx

Rx 56

Rx

BRG

BRG

Rx

Rx

Rx

4Eh

R

-

FIFO

busy-

busy-

1STP-

EMI

dlen

stype

FIFO

DBC

CIP

FMT

chg-A

late-A

late-A

err-A

emp-

A

A

A

chg-A

err-A

err-A

full-A

err-A

err-A

err-A

A

Initial Value

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘1’

‘0’

‘0’

‘0’

BIT

Bit Name

Action

Value

Function

Indicates that bridge-Ach is not in the process of transmit .

0

Indicates ‘0’ when Tx end- A (10h -bit14) is

set at

‘1’ and transmit process is

stopped.

15

Tx busy-A

Read

Indicates that bridge-Ach is in the process of transmit.

1

Indicates ‘1’ when Tx start -A (10h-bit15) is

set at

‘1’ and transmit process is

started.

0

Indicates that bridge-Ach is not in the process of receive.

Indicates ‘0’ when Rx end-A (3Ch -bit6) is set at ‘1’ and receive process is stopped.

14

Rx busy-A

Read

1

Indicates that bridge-Ach is in the process of receive.

Indicates ‘1’ when Rx start-A (3Ch -bit7) is set at ‘1’ and receive process is started.

0

Indicates that Isochronous packet received after starting receive process is not the

first packet received.

13

Rx 1STP-A

Read

Indicates that the first Isochronous packet is received after receive process is

1

started.

Clears to ‘0’ by lead of this register.

0

Indicates

that

EMI

information of

received

Isochronous

packet

header is

not

changed.

12

Rx EMI

Read

chg-A

Indicates that EMI informatio n of received Isochronous packet header has changed

1

from just former EMI information of packet received by Isochronous -cycle.

Clears to ‘0’ by lead of this register.

0

Indicates that odd/even information of received Isochronous packet

header is not

changed.

11

Rx o/e chg-A

Read

Indicates that odd/even information of received Isochronous packet header has

1

changed

from

just

former

odd/even information of

packet

received

by

Isochronous-cycle.

Clears to ‘0’ by lead of this register.

Rev.1.0 62 Fujitsu VLSI