LSI Specification | MB86617A |
8.16. Link register #01 (read/write)
Link Register#00 is the register that sets this node to perform as cycle master.
phy/ | R/W | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | Bit | |
link- | ||||||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
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3E h | R/W | - | - | - | - | - | - | - | - | - | - | cycle | - | - | - | - | - | |
master | ||||||||||||||||||
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Initial Value | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ‘0’’ | ‘0’ | ‘1’ | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ‘0’ | ||
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<Description of Each Bit
BIT | Bit Name | Action | Value | Function | |
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| Read | - | Always indicate ‘0’. | |
15 - 6 | reserved |
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Write | - | Always write in ‘0’. | |||
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| 0 | Does not cycle master. | |
5 | cycle master | Read |
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1 | Performs as cycle master if it is root. | ||||
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| Write | - | Sets the value of this bit at ‘0’ by writing in ‘1’. | |
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| Read | - | Always indicate ‘0’. | |
4 - 0 | reserved |
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Write | - | Always write in ‘0’. | |||
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Rev.1.0 | 98 | Fujitsu VLSI |