LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
98
8.16. Link register #01 (read/write)

Link Register#00 is the register that sets this node to perform as cycle master.

phy/
link-
addr R/W Bit
15 Bit
14 Bit
13 Bit
12 Bit
11 Bit
10 Bit
9 Bit
8 Bit
7 Bit
6 Bit
5 Bit
4 Bit
3 Bit
2 Bit
1 Bit
0
3E h R/W - - - - - - - - - - cycle
master - - - - -
Initial Value ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’’ ‘0’ ‘1’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’
<< Description of Each Bit
BIT Bit Name Action Value Function
Read - Always indicate ‘0’.
15 - 6 reserved
Write - Always write in ‘0’.
0 Does not cycle master.
Read
1 Performs as cycle master if it is root.
5 cycle master
Write - Sets the value of this bit at ‘0’ by writing in ‘1’.
Read - Always indicate ‘0’.
4 - 0 reserved
Write - Always write in ‘0’.