LSI Specification | MB86617A |
7.37.Transmit CGMS/TSCH Indicate Register [B]
Transmit CGMS/TSCH indicate register [B] indicates CGMS information and identification of TS type for source packet input from port B at TSP IC I/F.
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| R/W | Bit | Bit |
| Bit |
| Bit | Bit | Bit | Bit | Bit |
| Bit | Bit | Bit |
| Bit | Bit | Bit | Bit |
| Bit | |
| 15 | 14 | 13 |
| 12 |
| 11 | 10 | 9 | 8 |
| 7 | 6 | 5 |
| 4 | 3 | 2 | 1 |
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82h |
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Initial Value | “00 b” |
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| “00 h” |
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| “00 b” |
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| “00 h” |
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| BIT | Bit Name |
| Action |
| Value |
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15 - 14 |
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| Read |
| - | Indicates CGMS information for source packet indicated in |
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| (MSB: bit15, LSB: bit14) |
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| Indicates if ID of TS type for source packet input from port B at TSP IC I/F is | |||||||||||||
| 13 - 8 |
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| Read |
| - | different from that in low bit (TSCHB |
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| (MSB: bit13, LSB: bit8) |
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| 7 - 6 |
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| Read |
| - | Indicates CGMS information for source packet indicated in |
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| (MSB: bit7, LSB: bit6) |
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| 5 - 0 |
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| Read |
| - | Indicates ID of TS type for source packet input first from port B at TSP IC I/F |
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| (MSB: bit5, LSB: bit0) |
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Rev.1.0 | 75 | Fujitsu VLSI |