Fujitsu MB86617A manual Data Bridge Transmit/Receive Status Register B, Emi

LSI Specification MB86617A

7.29. Data Bridge Transmit/Receive Status Register [B]

Data bridge transmit/receive status register [B] indicates status of packet transmitted/received by bridge-Bch.

AD

R/W

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Tx

Rx

Rx

Rx

Rx o/e

Rx

Tx

Rx

Rx 56

Rx

BRG

BRG

Rx

Rx

Rx

50h

R

-

FIFO

busy-

busy-

1STP-

EMI

dlen

stype

FIFO

DBC

CIP

FMT

chg-B

late-B

late-B

err-B

emp-

B

B

B

chg-B

err-B

err-B

full-B

err-B

err-B

err-B

B

Initial Value

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘1’

‘0’

‘0’

‘0’

BIT

Bit Name

Action

Value

Function

Indicates that bridge-Bch is not in the process of transmit.

0

Indicates

‘0’

when

Tx end- B (12h -bit14)

is

set

at

‘1’ and transmit process is

stopped.

15

Tx busy-B

Read

Indicates that bridge-Bch is in the process of transmit.

1

Indicates

‘1’

when

Tx start -B (12h-bit15) is

set

at

‘1’ and transmit process is

started.

Indicates that bridge-Bch is not in the process of receive.

0

Indicates

‘0’

when

Rx end- B (3Ch- bit14) is

set

at

‘1’

and

receive

process is

stopped.

14

Rx busy-B

Read

Indicates that bridge-Bch is in the process of receive.

1

Indicates

‘1’

when

Rx start -B (3Ch- bit15) is set

at

‘1’

and

receive

process is

started.

0

Indicates that received Isochronous packet after starting receive process is not the

first receive packet.

13

Rx 1STP-B

Read

1

Indicates that the first Isochronous packet is received after starting receive process.

Clears to ‘0’ by lead of this register.

0

Indicates

that

EMI

information of

receive

Isochronous

packet

header is

not

changed.

12

Rx EMI

Read

chg-B

Indicates that EMI information of receive Isochronous packet header has changed

1

from just former EMI information of packet received by Isochronous -cycle.

Clears to ‘0’ by lead of this register.

0

Indicat es that odd/even information of receive Isochronous packet header is not

changed.

11

Rx o/e chg-B

Read

Indicates that odd/even information of receive Isochronous packet header has

1

changed

from just former

odd/even

information of

packet

received

by

Isochronous-cycle.

Clears to ‘0’ by lead of this register.

Rev.1.0 65 Fujitsu VLSI