Fujitsu MB86617A guide

LSI Specification

MB86617A

7.25. Receive Isochronous Packet Header Indicate Register 3 [B]

Receive Isochronous packet header indicate register 3 [B] is the register that indicates Isochronous packet header information received by bridge-Bch.

AD		R/W		Bit		Bit	Bit			Bit		Bit		Bit	Bit	Bit		Bit	Bit	Bit		Bit		Bit	Bit	Bit	Bit
AD		R/W	15			14	13			12		11	10		9	8		7	6	5		4		3	2	1	0
			15			14	13			12		11	10		9	8		7	6	5		4		3	2	1	0

48h		R	-			-	-					-	-		-	Rx EMI-B			Rx					Rx SID-B
48h		R	-			-	-					-	-		-	Rx EMI-B			o/e-B					Rx SID-B
																			o/e-B

Initial Value				‘0’		‘0’	‘0’			‘0’		‘0’		‘0’	‘0’	“00 b”			‘0’					“00 h”


		BIT			Bit Name				Action			Value								Function

	15 - 9				reserved				Read			-		Always indicate‘0’.

	8 - 7			Rx EMI-B					Read			-		Indicate EMI range of receive Isochronous packet header.
	8 - 7			Rx EMI-B					Read			-		(MSB: bit8, LSB: bit7)
														(MSB: bit8, LSB: bit7)

	6				Rx o/e-B				Read			-		Indicates odd/even range of receive Isochronous packet header.

	5 - 0				Rx SID-B				Read			-		Indicate SI range of CIP header of receive Isochronous packet.
	5 - 0				Rx SID-B				Read			-		(MSB: bit5, LSB: bit0)
														(MSB: bit5, LSB: bit0)

Rev.1.0

59

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Fujitsu MB86617A manual Receive Isochronous Packet Header Indicate Register 3 B