Fujitsu MB86617A manual 1Eh

LSI Specification MB86617A

7.12.Receive DSS Packet Header Indicate Register [A]/Transmit DSS Packet Header Setting Register [A]

Receive DSS packet header indicate register [A] indicates DSS packet header range of DSS packet received by bridge-Ach. Transmit DSS packet header setting register [A] sets DSS packet header range of DSS packet received by bridge -Ach.

AD

R/W

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

R

Rx-SI

Rx-System clock count-A(high)

F-A

1Eh

W

Tx-SIF

T x-System clock count-A(high)

-A

R

Rx-System clock count-A(low)

Rx-E

Reserved

F-A

20h

W

T x-System clock count-A(low)

Tx-E

reserved

F-A

R

reserved

22h

W

reserved

R

reserved

24h

W

reserved

R

reserved

26h

W

reserved

Initial Value

“0000 h ”

BIT	Bit Name	Active	Value	Function
	Rx-SIF-A	Read	-	Indicates SIF range of received DSS packet header.
15 (1Eh)
	T x-SIF-A	Write	-	Write in SIF range of transmits DSS packet header.
	Rx-System	Read	-	Indicate System clock count range of received DSS packet header.
14 - 0 (1Eh)	clock count-A			(MSB: 1Eh-bit14 , LSB: 20h-bit8)
15 - 8(20h)	T x-System	Write	-	Write in System clock count range of transmit DSS packet header.
	clock count-A			(MSB: 1Eh-bit14 , LSB: 20h-bit8)
	Rx-EF-A	Read	-	Indicates EF range of received DSS packet header.
7(20h)
	Tx-EF-A	Write	-	Write in EF range of transmits DSS packet header.
6 - 0(20h)		Read	-	Indicates reserved range of received DSS packet header.
15 - 0(22h)	reserved
15 - 0(24h)
15 - 0(26h)		Write	-	Write in reserved range of transmit DSS packet header.

Rev.1.0 44 Fujitsu VLSI