LSI Specification | MB86617A |
7.33. PHY/LINK Register/Address Setting Register
PHY/LINK register/address setting register is the register that sets address in order to access PHY/LINK register indirectly. PHY/LINK register indicated with address set by this register can be accessed from PHY/LINK register/access port.
AD |
| R/W | Bit | Bit |
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| Bit | Bit |
| Bit | Bit | Bit | Bit | Bit | Bit |
| Bit |
| Bit | Bit | Bit | Bit | |
| 15 | 14 | 13 |
| 12 |
| 11 | 10 | 9 | 8 | 7 | 6 | 5 |
| 4 |
| 3 | 2 | 1 | 0 | ||||
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60h |
| R/W | - | - | - |
| - |
| - | - | - | - | - |
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Initial Value | ‘0’ | ‘0’ |
| ‘0’ |
| ‘0’ | ‘0’ |
| ‘0’ | ‘0’ | ‘0’ | ‘0’ |
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| “00 h” |
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| BIT | Bit Name |
| Action |
| Value |
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| Read |
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| Always indicate‘0’. |
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| 15 - 7 | reserved |
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| Write |
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| Always write in ‘0’. |
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| 6 - 0 |
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| Read/ |
| - |
| Set address of PHY/LINK register to be accessed. |
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| Write |
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| (MSB: 6, LSB: 0) |
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Rev.1.0 | 71 | Fujitsu VLSI |