Fujitsu MB86617A manual TV2B TV1B, Port B

LSI Specification MB86617A

Register setting value and selection of output port are shown in the table below.

	Bit 15	Bit 14	Bit 7	Bit 6	Bit 1	Bit 0
Receive							TSP -IC I/F	TSP -IC I/F
Status	TV2B	TV1B	TV2A	TV1A	CMP	TS	Port A	Port B
					SEL	CMP
	0	0	0	1	0	0	Processing-Ach	-
							Receive data
	0	0	1	0	0	0	-	Processing-Ach
								Receive data
1ch receive
	0	1	0	0	0	0	Processing-Bch	-
							Receive data
	1	0	0	0	0	0	-	Processing-Bch
								Receive data
	1	0	0	1	0	0	Processing-Ach	Processing-Bch
							Receive data	Receive data
	0	1	1	0	0	0	Processing-Bch	Processing-Ach
							Receive data	Receive data
2ch receive	0	0	0	0	0	1	Processing-Ach+Bc	-
							h
							Receive data
	0	0	0	0	1	1	-	Processing-Ach+Bc
								h
								Receive data

Rev.1.0 43 Fujitsu VLSI