LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
72
7.34. PHY/LINK Register Access Port
PHY/LINK register access port is the port to access PHY/LINK register indirectly. PHY/LINK register indicated with address set by
PHY/LINK register/address setting register can be accessed from this port.
AD R/W Bit
15 Bit
14 Bit
13 Bit
12 Bit
11 Bit
10 Bit
9 Bit
8 Bit
7 Bit
6 Bit
5 Bit
4 Bit
3 Bit
2 Bit
1 Bit
0
62h R/W phy/link-data
Initial Value “0000 h”
BIT Bit Name Action Value Function
Read - Indicates PHY/LINK register contents defined by address set by PHY/LINK
register/address setting register. (MSB: 15, LSB: 0)
15 - 0 phy/link-data
Write - Executes write in the process of register defined by this address set by PHY/LINK
register/address setting register. (MSB: 15, LSB: 0)