LSI Specification | MB86617A |
7.20. Transmit Packet Link/Split Setting Register
Transmit packet link/split setting register is the register that sets number of link and split of source packets to be transmitted.
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| Bit | Bit |
| Bit | Bit |
| Bit | Bit |
| Bit | Bit | Bit | Bit |
| Bit | Bit |
| Bit | Bit | Bit | |||
| 15 |
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| 14 | 13 |
| 12 |
| 11 | 10 | 9 |
| 8 | 7 | 6 | 5 |
| 4 | 3 |
| 2 | 1 | 0 |
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| o/e |
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| Tx | NF5 |
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| o/e | Tx | NF5 |
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3Eh |
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| select- |
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| SPQB |
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| DBQB | select- |
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| SPQA |
| DBQA | ||||||||||
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| SPB |
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| SPA |
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| B |
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| A |
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Initial Value |
| ‘0’ |
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| ‘0’ | ‘0’ |
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| “000 b” |
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| “00 b” | ‘0’ | ‘0’ | ‘0’ |
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| Action |
| Value |
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| 0 |
| Selects odd/even value to be input from |
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| packet header to be transmitted by bridge |
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| Read/ |
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| 15 |
| o/e |
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| Write |
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| Selects Tx o/e- B (bit14) setting value as odd/even range of Isochronous packet |
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| 1 |
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| header to be transmitted by bridge |
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| Read/ |
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| Write in odd/even range of transmit Isochronous packet header. |
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| 14 |
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| Valid with o/e select- B (bit15) setting value |
| ‘1’, and reads in this setting value to |
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| transmit Isochronous packet header. |
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| 0 |
| Executes 2SP combined transmission as FIFO NFULL operation when setting of | ||||||||||||||
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| Read/ |
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| 2SP separated transmission or combined transmission for less than 2SP. |
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| 13 |
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| NF5SPB |
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| With more than 3 SP, executes according to setting. |
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| 1 |
| Executes 5 SP combined transmission at FIFO FULL. |
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| 12 - 10 |
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| SPQB |
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| Read/ |
| - |
| Write in number of link of source packet processed by |
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| 9 - 8 |
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| DBQB |
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| Read/ |
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| Write in number of split of source packet processed by |
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| 0 |
| Selects odd/even value to be input from |
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| packet header to be transmitted by bridge |
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| Read/ |
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| 7 |
| o/e |
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| Write |
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| 1 |
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| header to be transmitted by |
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| Read/ |
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| Write in odd/even range of transmit Isochronous packet header. |
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| Tx |
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| - |
| Valid with o/e | ‘1’, and reads in this setting value to |
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| transmit Isochronous packet header. |
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Rev.1.0 | 53 | Fujitsu VLSI |