Fujitsu MB86617A manual Receive Acknowledge Indicate Register

LSI Specification MB86617A

7.5. Receive Acknowledge Indicate Register

Receive Acknowledge indicate register is the register that indicates received Acknowledge packet addressed to itself. Read out this register after interrupt report of “Asynchronous packet send”.

AD

R/W

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0Ah

R

-

-

-

-

-

-

-

-

Receive ack-code

Receive ack-parity

Initial Value

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

‘0’

“0 h”

“0 h”

BIT

Bit Name

Action

Value

Function

15 - 8

reserved

Read

-

Always indicate ‘0’.

Receive

Indicate code of received Acknowledge packet addressed to it.

7 - 4

Acknowledge-co

Read

-

(MSB: bit7, LSB: bit5)

de

3 - 0

Receive

Read

-

Indicate parity of received Acknowledge packet addressed to it .

Acknowledge-par

(MSB: bit3, LSB: bit0)

ity

Note) In case of not receiving Acknowledge within specified time, this register indicates “00h ” and reports interrupt of “Acknowledge missing”.

Rev.1.0 33 Fujitsu VLSI