Intel SA-1100 manual DMA Register List, Physical Address Register Name Symbol

Peripheral Control Module

11.6.3DMA Register List

The following table lists the registers contained within the DMA controller:

Physical Address		Register Name	Symbol
Channel 0 Registers
0h B000	0000	DMA device address register.	DDAR0
0h B000	0004	DMA control/status register 0.
		Write ones to set.
			DCSR0
0h B000	0008	Write ones to clear.
0h B000	000C	Read only.
0h B000	0010	DMA buffer A start address 0.	DBSA0
0h B000	0014	DMA buffer A transfer count 0.	DBTA0
0h B000	0018	DMA buffer B start address 0.	DBSB0
0h B000	001C	DMA buffer B transfer count 0.	DBTB0
Channel 1 Registers
0h B000	0020	DMA device address register 1.	DDAR1
0h B000	0024	DMA control/status register 1.
		Write ones to set.
			DCSR1
0h B000	0028	Write ones to clear.
0h B000	002C	Read only.
0h B000	0030	DMA buffer A start address 1.	DBSA1
0h B000	0034	DMA buffer A transfer count 1.	DBTA1
0h B000	0038	DMA buffer B start address 1.	DBSB1
0h B000	003C	DMA buffer B transfer count 1.	DBTB1
Channel 2 Registers
0h B000	0040	DMA device address register 2	DDAR2
0h B000	0044	DMA control/status register 2.
		Write ones to set.
			DCSR2
0h B000	0048	Write ones to clear.
0h B000	004C	Read only.
0h B000	0050	DMA buffer A start address 2.	DBSA2
0h B000	0054	DMA buffer A transfer count 2.	DBTA2
0h B000	0058	DMA buffer B start address 2.	DBSB2
0h B000	005C	DMA buffer B transfer count 2.	DBTB2
Channel 3 Registers
0h B000	0060	DMA device address register 3.	DDAR3
0h B000	0064	DMA control/status register 3.
		Write ones to set.
			DCSR3
0h B000	0068	Write ones to clear.
0h B000	006C	Read only.

11-14 SA-1100 Developer’s Manual