Memory and PCMCIA Control Module 10

The external memory bus interface for the Intel® StrongARM® SA-1100 Microprocessor (SA-1100) supports standard fast-page and EDO asynchronous DRAMs, burst and nonburst ROMs, Flash EPROMs, SRAM, and PCMCIA expansion devices. It is programmable through the memory interface configuration registers. Figure 10-1shows a block diagram of the maximum configuration of the memory controller.

Figure 10-1. General Memory Interface Configuration

Intel®

StrongARM®*

SA-1100

Memory

Controller

Interface

RAS3

 

 

 

DRAM Bank 3

 

 

 

RAS2

 

 

 

DRAM Bank 2

DRAM Memory Interface

 

RAS1

Up to 4 banks of Standard, EDO,

or Burst EDO DRAM Memory

 

DRAM Bank 1

 

(32-bits wide)

 

 

 

 

 

RAS0

 

 

 

DRAM Bank 0

 

 

 

CAS<3:0>

 

 

 

Data Bus

Buffers

Socket 0

PCMCIA Interface

 

Address Bus

and

Socket 1

Up to 2-socket support.

Transceivers

Requires some

 

 

 

 

 

external buffering

PCMCIA Control

 

 

 

CS0

 

 

 

Static Bank 0

 

 

 

CS1

Static Memory Interface

 

Static Bank 1

Up to 4 banks of ROM, Flash, SRAM memory

 

CS2

(16-bit or 32-bit wide)**

 

 

 

 

Static Bank 2

** NOTE:

 

 

 

 

 

CS3

SRAM width is required to be 32 bits.

Static Bank 3

Static bank 0 must be populated by "bootable" memory

 

Static RAM support is available in nonRAM systems only.

* StrongARM is a registered trademark of ARM Limited..

A6841-01

10.1Overview of Operation

The SA-1100 memory interface supports three interfaces:

DRAM Memory Interface

The dynamic memory interface supports four 32-bit wide banks of fast-page or EDO asynchronous DRAMs. Each bank is allocated 128 Mbyte of the internal memory map. However, the actual size of each bank is dependent on the particular DRAM configuration used. If multiple banks are populated, each must be identical in size and configuration. There are 4 bank selects, nRAS<3:0>,

SA-1100 Developer’s Manual

10-1

Page 115
Image 115
Intel manual Memory and Pcmcia Control Module, Overview of Operation, Intel, SA-1100 Memory Controller Interface