System Control Module

Figure 9-1. General-Purpose I/O Block Diagram

 

0

GPIO Pin

1

 

 

Edge

 

Detect

9.1.1GPIO Register Definitions

Pin Direction

Register

Alternate Function

Register

Pin Set and

Clear Registers

Alternate Function

(Output)

Alternate Function

(Input)

Edge Detect

Status Register

Rising Edge Detect

Enable Register

Falling Edge Detect

Enable Register

Pin-Level

Register

There are a total of eight registers within the GPIO control block: one is used to monitor pin state; two are used to control pin state; one is used to control pin direction; two are used to specify a pin’s edge type that should be detected; and one is used to flag when specified edge types are detected on pins. The last register indicates whether a pin is used as normal GPIO or whether it is taken over by the alternate function. Note that the pin direction register (GPDR) is the only register that is initialized by reset. The values in all other GPIO registers are unknown following reset and must be initialized by software.

9-2

SA-1100 Developer’s Manual

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Intel SA-1100 manual Gpio Register Definitions, Gpio Pin Edge Detect