National Instruments 320030-01 - page 171

Chapter 7 Diagnostic and Troubleshooting Test Procedures

© National Instruments Corporation 7-7 GPIB-1014 User Manual

005 OCR0 = 02

045 OCR1 = 0A

006 SCR0 = 04

046 SCR1 = 04

029 MFC0 = 06

00C MAR0 = 00003000 4-byte address (00003000) of the first two data

bytes

00A MTC0 = 0002 2-byte transfer count (0002)

069 MFC1 = 06

079 BFC1 = 06

05C BAR1 = 00003004 4-byte address (00003004) of the carry cycle array

05A BTC1 = 0002 carry cycle array has two entries - two small

memory blocks to be transferred

000 CSR0 = FF

040 CSR1 = FF

11B AUXMR = 2 TLC Reset

119 ADMR = C0 ton,lon

115 IMR2 = 20 DMA out enable

047 CCR1 = 80 start channel 1

007 CCR0 = 80 start channel 0

11B AUXMR = 0 Immediate execute pon, TLC immediately sets DO

in ISR1, requests a DMA transfer for a byte from

memory

113 ISR1 = 1? DO is cleared here because a byte has been

transferred from memory to TLC's CDOR. TLC

does not currently request for DMA transfer

111 CDOR = 1? check the first data byte that was transferred from

memory to TLC, after this read the TLC will

request for another DMA transfer

113 ISR1 = 1? DO is cleared here because a byte has been

transferred from memory to TLC's CDOR

111 DIR = 2? second data byte that was transferred from memory

to TLC, after this read the TLC will request for

another DMA transfer

000 CSR0 = 81? channel 0 finished (COC)

04A MTC1 = 0001? last data byte transferred will make count=1

113 ISR1 = 13? END, DO, and DI (carry cycle byte will set END

bit)

111 DIR = 3? last data byte

040 CSR1 = 0A? GPIB synchronized

047 CCR1 = 10 software abort

040 CSR1 = FF clear status bits

14. Test DMA transfer (flyby) from GPIB to memory, one byte, memory write, use the Carry

Cycle feature.

Addresses 3000 to 300E are used for this test, other locations may be used if required.

Contents

Main Page Limited Warranty Copyright Trademarks Page FCC/DOC Radio Frequency Interference Compliance Federal Communications Commission Canadian Department of Communications Instructions to Users Contents Chapter 5 Programming Considerations Chapter 6 Theory of Operation Page Appendix F Mnemonics Key Appendix G Customer Communication Glossary Index Figures Tables About This Manual Organization of This Manual Conventions Used in This Manual Related Documentation Customer Communication Chapter 1 Introduction Page What Your Kit Should Contain Optional Equipment Unpacking Chapter 2 General Description Electrical Characteristics VMEbus Characteristics VMEbus Slave-Addressing VMEbus Slave-Data Table 2-3. 68450 Internal DMA Registers Ad (continues) VMEbus Master-Direct Memory Access Interrupter Data Transfer Bus (DTB) Requester Diagnostic Aids Data Transfer Features Programmed I/O Transfers GPIB-1014 Functional Description Chapter 2 General Description Figure 2-1. GPIB-1014 with a VMEbus Computer National Instruments Corporation 2-9 GPIB-1014 User Manual General Description Chapter 2 Figure 2-2. GPIB-1014 in a Multiprocessor Application GPIB-1014 User Manual 2-10 National Instruments Corporation Chapter 2 General Description National Instruments Corporation 2-11 GPIB-1014 User Manual Figure 2-3 is a block diagram of the GPIB-1014. Figure 2-3. GPIB-1014 Block Diagram Page Page Page Page Page Page Access Mode Base Address Page DMA Address Modifier Code Output Page Other Configuration Parameters Installation Verification of System Compatibility Configuration and Installation Chapter 3 GPIB-1014 User Manual 3-8 National Instruments Corporation Table 3-3. GPIB-1014 Pin Assignment on VMEbus Connector P1 Pin No. Signal Used Signal Not Used Pin No. Signal Used Signal Not Used Chapter 3 Configuration and Installation National Instruments Corporation 3-9 GPIB-1014 User Manual Table 3-4. GPIB-1014 Pin Assignment on VMEbus Connector P2 Signal Signal Signal Signal Pin No. Used Not Used Notes Pin No. Used Not Used Notes Notes Cabling Verification Testing Chapter 4 Register Bit Descriptions Register Map Register Sizes Register Description Page Interface Registers Figure 4-1. Interface Registers Figure 4-2. Writing to the Hidden Registers Data In Register (DIR) Command/Data Out Register (CDOR) Interrupt Status Register 1 (ISR1) Interrupt Mask Register 1 (IMR1) Page Page Page Page Page Interrupt Status Register 2 (ISR2) Interrupt Mask Register 2 (IMR2) Page Page Page Page Serial Poll Status Register (SPSR) Serial Poll Mode Register (SPMR) Address Status Register (ADSR) Page Address Mode Register (ADMR) Page Page Command Pass Through Register (CPTR) Page Auxiliary Mode Register (AUXMR) Page Page Page Page Page Hidden Registers Page Page Page Page Page Page Page Page Address Register 0 (ADR0) Address Register (ADR) Address Register 1 (ADR1) End of String Register (EOSR) DMA Registers Chapter 4 Register Descriptions Figure 4-3. DMA Register Memory Map National Instruments Corporation 4-47 GPIB-1014 User Manual Reprinted from the Motorola MC68440 Advance Information manual. Address Registers Transfer Count Registers Function Code Registers Device Control Register Page Operation Control Register Page Sequence Control Register Channel Control Register Page Channel Status Register Page Channel Error Register Channel Priority Register Interrupt Vector Registers General Control Register Configuration Registers Page Page Page Chapter 5 Programming Considerations Initialization Page The GPIB-1014 as GPIB Controller Becoming Controller-In-Charge (CIC) and Active Controller Sending Remote Multiline Messages (Commands) Going from Active to Standby Controller Going from Standby to Active Controller Going from Active to Idle Controller The GPIB-1014 as GPIB Talker and Listener Programmed Implementation of Talker and Listener Addressed Implementation of the Talker and Listener Page Sending/Receiving Messages Using Direct Memory Access Page Page Page Page Page Page Page Page Page Page Page Using Programmed I/O Interrupts Page Serial Polls Conducting a Serial Poll Responding to a Serial Poll Parallel Polls Conducting a Parallel Poll Responding to a Parallel Poll Chapter 6 Theory of Operation VMEbus Interface Data Lines Control Signals Address Control Equations of Transceivers Address Decoding Clock and Reset Circuitry Configuration Registers Configuration Register 1 Page Configuration Register 2 Timing State Machine Slave Cycles DMA Cycles DMA Gating and Control Interrupter DTB Requester and Controller Page Page GPIB Synchronization and Interrupt Control Page Page 68450 DMAC DMAC Channel Operation Page Page Page Page Page Page Page Page Page GPIB Interface Test and Troubleshooting DMA Stand-Alone Testing GPIB Interface Testing Page Chapter 7 Diagnostic and Troubleshooting Test Procedures Interpreting Test Procedures GPIB-1014 Hardware Installation Tests Page Page Page Page Page Page Page Appendix A Hardware Specifications Page Page Appendix C Sample Programs ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Multiline Interface Messages Hex Oct Dec ASCII Msg Hex Oct Dec ASCII Msg Message Definitions Multiline Interface Messages Hex Oct Dec ASCII Msg Hex Oct Dec ASCII Msg Appendix E Operation of the GPIB Types of Messages Talkers, Listeners, and Controllers The Controller-In-Charge and System Controller GPIB Signals and Lines Data Lines Handshake Lines Interface Management Lines Operation of the GPIB Appendix E GPIB-1014 User Manual E-4 National Instruments Corporation Physical and Electrical Characteristics Figure E-1. The GPIB Connector and Signal Assignments Page Configuration Requirements Related Documents Appendix F Mnemonics Key A B Page C D E F G H I L M N O P R S T Page Appendix G Customer Communication Technical Support Form ____________________________________________________ GPIB-1014 Hardware and Software Configuration Form National Instruments Products Other Products Page Documentation Comment Form Glossary ___________________________________________________ Index Numbers A B C D Page Page Page E F G H I Page J L M N O P Page R S Page T Page Page U V W