GPIB-1014 User Manual Index-1 © National Instruments Corporation
Index

Numbers

0 (Reserved Bit)
Channel Error Register, 4-60
Channel Priority Register, 4-61
Channel Status Register, 4-59
Configuration Register 2 (CFG2), 4-66
Device Control Register, 4-52
General Control Register, 4-63
Operation Control Register, 4-53
Sequence Control Register, 4-55
0 (Reserved Bits)
Address Mode Register (ADMR), 4-22
Auxiliary Register E (AUXRE), 4-41
Internal Counter Register (ICR), 4-34
68450 DMAC. See DMAC (68450).

A

abbreviations used in the manual, vi
access mode, configuring, 3-3
ACT (Channel Active Bit), 4-59
AD5-0 through AD1-0 (Mode 2 Primary GPIB Address Bits 5-0 through 1-0), 4-42
AD5-1 (TLC GPIB Address Bit 5 through 1), 4-42
AD[5-1 -- 1-1] (Mode 2 Secondary TLC GPIB Address Bits 5-1 through 1-1), 4-44
address
address decoder, 2-12
base address configuration
overview, 3-3
setting with compare address lines, 3-4
setting with jumper block W1, 3-4
compare address lines, 3-3
decoding, 6-3 to 6-4
operands and addressing, DMAC channel operation, 6-17
VMEbus address lines, 6-2
VMEbus slave-addressing, 2-2 to 2-3
Address Mode Register (ADMR), 4-22 to 4-24
address modifier code output. See DMA address modifier code output.
Address Register (ADR), 4-43
Address Register 0 (ADR0), 4-42
Address Register 1 (ADR1), 4-44
Address Registers, DMA
Base Address Register (BAR), 4-48
Device Address Register (DAR), 4-48