Index
© National Instruments Corporation Index-4 GPIB-1014 User Manual
commands or command messages, E-1
multiline GPIB commands (table), 4-25 to 4-26, D-2 to D-3
compare address lines
location of, 3-3
setting base address, 3-4
compliance levels for GPIB-1014 IEEE 1014 interrupter, 2-15
configuration
access mode, 3-3
base address, 3-3 to 3-4
DMA address modifier code output, 3-5 to 3-7
hardware jumpers, 3-1
jumpers and switches (illustration), 3-2
other configuration parameters, 3-7
requirements, E-6
Supervisor or Non-privileged access, 3-3
Configuration Registers
Configuration Register 1 (CFG1), 4-64 to 4-65
Configuration Register 2 (CFG2), 4-66 to 4-67
definition of, 2-12
GPIB-1014 Configuration registers (chart), 2-5
register map, 4-2
theory of operation, 6-5 to 6-6
control equations of transceivers, 6-3
Controller function
becoming controller-in-charge (CIC) and active controller, 5-3
Controller-In-Charge (CIC) and System Controller, E-2
going from active to idle, 5-5
going from active to standby, 5-4
going from standby to active, 5-5
operation of, E-1 to E-2
sending remote multiline messages (commands), 5-4
CP (Channel Priority Bits 1 through 0), 4-61
CPR. See Channel Priority Register (CPR).
CPT (Command Pass-Through Bit), 4-8 to 4-9
CPT[7-0] (Command Pass Through Bits 7 through 0), 4-25 to 4-26
CPT ENABLE (Command Pass Through Enable Bit), 4-40
CPT IE (Command Pass-Through Interrupt Enable Bit), 4-8 to 4-9
CPTR. See Command Pass Through Register (CPTR).
CSR. See Channel Status Register (CSR).
Customer support, vii
D
DAC (Device Address Count Bits 1 through 0), 4-55
DAR. See Device Address Register (DAR).
Data In Register (DIR), 4-6
data lines
GPIB signals and lines, E-2