Index
© National Instruments Corporation Index-10 GPIB-1014 User Manual
GPIB-1014 compatibility, 1-1
GPIB-1014 compliance levels, 2-15
IFC (interface clear) line, E-3
Immediate Execute Pon command
codes for, 4-28
description, 4-29
IMR1. See Interrupt Mask Register 1 (IMR1).
initialization of GPIB-1014, 5-1 to 5-3
INITIALIZE-INIT sample program, C-5 to C-6
installation
cabling, 3-10
hardware installation tests, 7-2 to 7-8
prerequisites for, 3-1
unpacking the GPIB-1014, 1-4
verification of system compatibility, 3-7 to 3-9
verification testing, 3-10
INT (Interrupt Bit), 4-14 to 4-15
INTERFACE CLEAR-IFC sample program, C-7
interface management lines
ATN (attention), E-3
EOI (end or identify), E-3
IFC (interface clear), E-3
overview, E-3
REN (remote enable), E-3
SRQ (service request), E-3
interface registers
Address Mode Register (ADMR), 4-22 to 4-24
Address Register (ADR), 4-43
Address Register 0 (ADR0), 4-42
Address Register 1 (ADR1), 4-44
Address Status Register (ADSR), 4-20 to 4-21
Auxiliary Mode Register (AUXMR), 4-27 to 4-33
Command/Data Out Register (CDOR), 4-7
Command Pass Through Register (CPTR), 4-25 to 4-26
Data In Register (DIR), 4-6
End of String Register (EOSR), 4-45
hidden registers
Auxiliary Register A (AUXRA), 4-37 to 4-38
Auxiliary Register B (AUXRB), 4-39 to 4-40
Auxiliary Register E (AUXRE), 4-41
Internal Counter Register (ICR), 4-34
overview, 4-33
Parallel Poll Register (PPR), 4-35 to 4-36
illustration, 4-4
Interrupt Mask Register 1 (IMR1), 4-8 to 4-13
Interrupt Mask Register 2 (IMR2), 4-14 to 4-18
Interrupt Status Register 1 (ISR1), 4-8 to 4-13
Interrupt Status Register 2 (ISR2), 4-14 to 4-18
overview, 4-3