Table 5–26 Cbox Read IPR Fields Description (Continued)

NameDescription

C_STAT[4:0]

As follows:

 

Bits

Error Status

 

0 0 0 0 0

Either no error, or error on a speculative load, or a Bcache victim read

 

 

due to a Dcache/Bcache miss

 

0 0 0 0 1

BC_PERR (Bcache tag parity error)

 

0 0 0 1 0

DC_PERR (duplicate tag parity error)

00 0 1 1 DSTREAM_MEM_ERR

00 1 0 0 DSTREAM_BC_ERR

00 1 0 1 DSTREAM_DC_ERR

00 1 1 X PROBE_BC_ERR

01 0 0 0 Reserved

01 0 0 1 Reserved

01 0 1 0 Reserved

01 0 1 1 ISTREAM_MEM_ERR

01 1 0 0 ISTREAM_BC_ERR

01 1 0 1 Reserved

01 1 1 X Reserved

10 0 1 1 DSTREAM_MEM_DBL1

1 0 1 0 0 DSTREAM_BC_DBL1

1 1 0 1 1 ISTREAM_MEM_DBL1 1 1 1 0 0 ISTREAM_BC_DBL1

1

When the Cbox WRITE_ONCE chain bit

 

 

SKEWED_FILL_MODE[0] is clear, the error status is as specified;

 

when set, the error status applies only to first octaword of the fill, and

 

error status for the rest of the fill is generic DOUBLE_BIT_ERROR

 

(1XXXX).

C_STS[3:0]

If C_STAT equals xxx_MEM_ERR or xxx_BC_ERR, then C_STS contains the

 

status of the block as follows; otherwise, the value of C_STS is X:

 

Bit Value

Status of Block

 

7:4

Reserved

 

3

Parity

 

2

Valid

 

1

Dirty

 

0

Shared

C_ADDR[6:42]

Address of last reported ECC or parity error. If C_STAT value is

 

DSTREAM_DC_ERR, only bits 6:19 are valid.

 

 

 

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Compaq EV68A specifications 0 1 1 Dstreammemerr, 0 1 1 Istreammemerr