Compaq EV68A specifications PALmode Environment

PALmode Environment

•There are some necessary support functions that are too complex to implement directly in a processor chip’s hardware, but that cannot be handled by a normal operating system software routine. Routines to fill the translation buffer (TB), acknowledge interrupts, and dispatch exceptions are some examples. In some archi- tectures, these functions are handled by microcode, but the Alpha architecture is careful not to mandate the use of microcode so as to allow reasonable chip imple- mentations.

•There are functions that must run atomically, yet involve long sequences of instruc- tions that may need complete access to all of the underlying computer hardware. An example of this is the sequence that returns from an exception or interrupt.

•There are some instructions that are necessary for backward compatibility or ease of programming; however, these are not used often enough to dedicate them to hardware, or are so complex that they would jeopardize the overall performance of the computer. For example, an instruction that does a VAX style interlocked mem- ory access might be familiar to someone used to programming on a CISC machine, but is not included in the Alpha architecture. Another example is the emulation of an instruction that has no direct hardware support in a particular chip implementa- tion.

In each of these cases, PALcode routines are used to provide the function. The routines are nothing more than programs invoked at specified times, and read in as Istream code in the same way that all other Alpha code is read. Once invoked, however, PALcode runs in a special mode called PALmode.

6.2 PALmode Environment

PALcode runs in a special environment called PALmode, defined as follows:

•Istream memory mapping is disabled. Because the PALcode is used to implement translation buffer fill routines, Istream mapping clearly cannot be enabled. Dstream mapping is still enabled.

•The program has privileged access to all of the computer hardware. Most of the functions handled by PALcode are privileged and need control of the lowest levels of the system.

•Interrupts are disabled. If a long sequence of instructions need to be executed atomically, interrupts cannot be allowed.

An important aspect of PALcode is that it uses normal Alpha instructions for most of its operations; that is, the same instruction set that nonprivileged Alpha programmers use. There are a few extra instructions that are only available in PALmode, and will cause a dispatch to the OPCDEC PALcode entry point if attempted while not in PALmode. The Alpha architecture allows some flexibility in what these special PALmode instructions do. In the 21264/EV68A, the special PALmode-only instructions perform the following func- tions:

•Read or write internal processor registers (HW_MFPR, HW_MTPR)

•Perform memory load or store operations without invoking the normal memory- management routines (HW_LD, HW_ST)

•Return from an exception or interrupt (HW_RET)

6–2 Privileged Architecture Library Code 21264/EV68A Hardware Reference Manual