Compaq EV68A Error Detection and Error Handling, Electrical Data, Thermal Management

7.11.2.1	GCLK	7–19
7.11.2.2	Differential 21264/EV68A Clocks	7–19
7.11.2.3	Nominal Operating Frequency	7–19
7.11.2.4	Power-Up/Reset Clocking	7–20

8 Error Detection and Error Handling

	8.1	Data Error Correction Code	8–2
	8.2	Icache Data or Tag Parity Error	8–2
	8.3	Dcache Tag Parity Error	8–2
	8.4	Dcache Data Single-Bit Correctable ECC Error	8–3
	8.4.1	Load Instruction	8–3
	8.4.2	Store Instruction (Quadword or Smaller)	8–4
	8.4.3	Dcache Victim Extracts	8–4
	8.5	Dcache Store Second Error	8–4
	8.6	Dcache Duplicate Tag Parity Error	8–4
	8.7	Bcache Tag Parity Error	8–5
	8.8	Controlling Bcache Block Parity Calculation	8–5
	8.9	Bcache Data Single-Bit Correctable ECC Error	8–5
	8.9.1	Icache Fill from Bcache	8–5
	8.9.2	Dcache Fill from Bcache	8–6
	8.9.3	Bcache Victim Read	8–7
	8.9.3.1	Bcache Victim Read During a Dcache/Bcache Miss	8–7
	8.9.3.2	Bcache Victim Read During an ECB Instruction	8–7
	8.10	Memory/System Port Single-Bit Data Correctable ECC Error	8–7
	8.10.1	Icache Fill from Memory	8–7
	8.10.2	Dcache Fill from Memory	8–8
	8.11	Bcache Data Single-Bit Correctable ECC Error on a Probe	8–9
	8.12	Double-Bit Fill Errors	8–9
	8.13	Error Case Summary	8–10
9	Electrical Data
	9.1	Electrical Characteristics	9–1
	9.2	DC Characteristics	9–2
	9.3	Power Supply Sequencing and Avoiding Potential Failure Mechanisms	9–5
	9.4	AC Characteristics	9–6
10	Thermal Management
	10.1	Operating Temperature	10–1
	10.2	Heat Sink Specifications	10–3
	10.3	Thermal Design Considerations	10–6
11	Testability and Diagnostics
	11.1	Test Pins	11–1
	11.2	SROM/Serial Diagnostic Terminal Port	11–2
	11.2.1	SROM Load Operation	11–2
	11.2.2	Serial Terminal Port	11–2
	11.3	IEEE 1149.1 Port	11–3
	11.4	TestStat_H Pin	11–4
	11.5	Power-UpSelf-Test and Initialization	11–5
	11.5.1	Built-inSelf-Test	11–5

viii 21264/EV68A Hardware Reference Manual