Compaq EV68A Memory/System Port Single-Bit Data Correctable ECC Error, Bcache Victim Read

Memory/System Port Single-Bit Data Correctable ECC Error

Note: Errors in speculative load instructions cause a CRD error to be posted but the data is not scrubbed by hardware. The PALcode cannot perform a scrub operation because C_STAT is zero and C_ADDR does not contain the address of the block in error.

8.9.3 Bcache Victim Read

A victim from the Bcache is written directly to the system port, without correction. The ECC parity checker on the LSD detects the error and posts a corrected read data (CRD) error interrupt. The Cbox error register is not updated.

8.9.3.1 Bcache Victim Read During a Dcache/Bcache Miss

While the Bcache is servicing a Dcache miss and that Bcache access is also a miss, and an error occurs during that Bcache data access, the Cbox does not latch the error infor- mation. However, the Mbox correction state machine is activated and it invokes a CRD error despite the fact that no correction is performed.

The Bcache access error is written out to memory and is subsequently detected and cor- rected by the next consumer of the data.

•No correction is made.

•No status is logged (C_STAT = 0).

•A CRD error interrupt is posted, when enabled.

8.9.3.2Bcache Victim Read During an ECB Instruction

A victim from the Bcache that occurs while an ECB instruction is being executed is written directly to the system port without correction. No Cbox registers are set and no exception is taken.

8.10 Memory/System Port Single-Bit Data Correctable ECC Error

The following actions may cause memory/system port data ECC errors:

•Icache fill–data possibly used by Icache

•Dcache fill–data possibly used by a load instruction

The recovery mechanism depends on the event that caused the error.

8.10.1 Icache Fill from Memory

For an Icache fill the LSD ECC generators detect the error, and bad Icache data parity is generated for the octaword that contains the quadword in error.

•The hardware flushes the Icache.

•C_STAT[ISTREAM_MEM_ERR] is set.

•C_ADDR contains bits [42:6] of the system memory fill address of the block that contains the error.

•C_SYNDROME_0[7:0] and C_SYNDROME_1[7:0] contain the syndrome of quadword 0 and 1, respectively, of the octaword subblock that contains the error.

21264/EV68A Hardware Reference Manual Error Detection and Error Handling 8–7