Compaq EV68A specifications Cache Block State Transitions, Mands. -4lists these commands

Cache Coherency

Table 4–2 21264/EV68A-Supported Cache Block States (Continued)

State Name	Description
Clean/Shared	This 21264/EV68A holds a read-only copy of the block, and at least one other agent in the
	system may hold a copy of the block. Upon eviction, the block is not written to memory.
Dirty	This 21264/EV68A holds a read-write copy of the block, and must write it to memory after it
	is evicted from the cache. No other agent in the system holds a copy of the block.
Dirty/Shared	This 21264/EV68A holds a read-only copy of the dirty block, which may be shared with
	another agent. The block must be written back to memory when it is evicted.

4.5.3 Cache Block State Transitions

Cache block state transitions are reflected by 21264/EV68A-generated commands to the system. Cache block state transitions can also be caused by system-generated com- mands to the 21264/EV68A (probes). Probes control the next state for the cache block. The next state can be based on the previous state of the cache block. Table 4–3lists the next state for the cache block.

Table 4–3 Cache Block State Transitions

Next State				Action Based on Probe Hit
No change				Do not update cache state. Useful for DMA transactions that sample data but
				do not want to update tag state.
Clean				Independent of previous state, update next state to Clean.
Clean/Shared				Independent of previous state, update next state to Clean/Shared. This transac-
				tion is useful for systems that update memory on probe hits.
T1:				Based on	the dirty bit, make the block clean or dirty shared. This transaction
Clean	Clean/Shared			is useful for systems that do not update memory on probe hits.
Dirty	Dirty/Shared
T3:				If the block is Clean or Dirty/Shared, change to Clean/Shared. If the block is
Clean	Clean/Shared			Dirty, change to Invalid. This transaction is useful for systems that use the
Dirty ⇒Invalid				Dirty/Shared state as an exclusive state.
Dirty/Shared		Clean/Shared
		⇒	The cache state transitions caused by 21264/EV68A-generated commands are under the
			full control of the system environment using the SysDc (system data control) com-
			mands. Table 4–4lists these commands.
Table 4–4 System Responses to 21264/EV68A Commands
Response Type				21264/EV68A Action
SysDc ReadData				Fill block with the associated data and update tag with clean cache status.
SysDc ReadDataDirty				Fill block with the associated data and update tag with dirty cache status.
SysDc ReadDataShared				Fill block with the associated data and update tag with shared cache status.
SysDc ReadDataShared/Dirty				Fill block with the associated data and update tag with dirty/shared status.
SysDc ReadDataError				Fill block with all-ones reference pattern and update tag with invalid status.
SysDc ChangeToDirtySuccess				Unconditionally update block with dirty cache status.
SysDc ChangeToDirtyFail				Do not update cache status and fail any associated STx_C instructions.
4–10Cache and External Interfaces					21264/EV68A Hardware Reference Manual