Compaq specifications 1221264/EV68A Boundary-Scan Register

Boundary-Scan Register

" 38	( BC_2, BcData_H(63),	BIDIR,		x, 50,	0,	Z	), "& --
" 37	( BC_2, SysCheck_L(7),	BIDIR,		x, 53,	0,	WEAK1 ), "& --
" 36	( BC_2, BcCheck_H(15),	BIDIR,		x, 50,	0,	Z	), "& --
" 35	( BC_2, BcCheck_H(7),	BIDIR,		x, 50,	0,	Z	), "& --
" 34	( BC_2, SysAddOut_L(0),	OUTPUT2,		x			), "& --
" 33	( BC_2, SysAddOut_L(1),	OUTPUT2,		x			), "& --
" 32	( BC_2, SysAddOut_L(2),	OUTPUT2,		x			), "& --
" 31	( BC_2, SysAddOut_L(3),	OUTPUT2,		x			), "& --
" 30	( BC_2, SysAddOut_L(4),	OUTPUT2,		x			), "& --
" 29	( BC_2, SysAddOut_L(5),	OUTPUT2,		x			), "& --
" 28	( BC_2, SysAddOut_L(6),	OUTPUT2,		x			), "& --
" 27	( BC_2, SysAddOut_L(7),	OUTPUT2,		x			), "& --
" 26	( BC_2, SysAddOutClk_L,	OUTPUT2,		x			), "& --
" 25	( BC_2, SysAddOut_L(8),	OUTPUT2,		x			), "& --
" 24	( BC_2, SysAddOut_L(9),	OUTPUT2,		x			), "& --
" 23	( BC_2, SysAddOut_L(10),	OUTPUT2,		x			), "& --
" 22	( BC_2, SysAddOut_L(11),	OUTPUT2,		x			), "& --
" 21	( BC_2, SysAddOut_L(12),	OUTPUT2,		x			), "& --
" 20	( BC_2, SysAddOut_L(13),	OUTPUT2,		x			), "& --
" 19	( BC_2, SysAddOut_L(14),	OUTPUT2,		x			), "& --
" 18	( BC_3, SysAddIn_L(0),	INPUT,		x			), "& --
" 17	( BC_3, SysAddIn_L(1),	INPUT,		x			), "& --
" 16	( BC_3, SysAddIn_L(2),	INPUT,		x			), "& --
" 15	( BC_3, SysAddIn_L(3),	INPUT,		x			), "& --
" 14	( BC_3, SysAddIn_L(4),	INPUT,		x			), "& --
" 13	( BC_3, SysAddIn_L(5),	INPUT,		x			), "& --
" 12	( BC_3, SysAddIn_L(6),	INPUT,		x			), "& --
" 11	( BC_3, SysAddIn_L(7),	INPUT,		x			), "& --
" 10	( BC_3, SysAddIn_L(8),	INPUT,		x			), "& --
" 9	( BC_3, SysAddInClk_L,	INPUT,		x			), "& --
" 8	( BC_3, SysAddIn_L(9),	INPUT,		x			), "& --
" 7	( BC_3, SysAddIn_L(10),	INPUT,		x			), "& --
" 6	( BC_3, SysAddIn_L(11),	INPUT,		x			), "& --
" 5	( BC_3, SysAddIn_L(12),	INPUT,		x			), "& --
" 4	( BC_3, SysAddIn_L(13),	INPUT,		x			), "& --
" 3	( BC_3, SysAddIn_L(14),	INPUT,		x			), "& --
" 2	( BC_3, SysFillValid_L,	INPUT,		x			), "& --
" 1	( BC_3, SysDataInValid_L,	INPUT,		x			),	"& --
" 0	( BC_3, SysDataOutValid_L,	INPUT,		x			)	";
attribute DESIGN_WARNING of Alpha_21264b: entity is
"1. IEEE 1149.1 circuits on Alpha		21264b	are designed primarily to support						"&

"testing in off-line module manufacturing environment. The SAMPLE/PRELOAD"&

"instruction support is designed primarily for supporting interconnection"&

"	verification test				and not for at-speed samples of pin data.		"&
"2.	TDO	is Open-Drain			signal.		"&
"3.	Add	comment	on	port pin		electrical characteristics:	"&
"4.	Comment out		if	compiler		does not support this statement.	";

end Alpha_21264b;

B–1221264/EV68A Boundary-Scan Register 21264/EV68A Hardware Reference Manual