Opcodes Reserved for PALcode

Figure 6–3 HW_RET Instruction Format

31

 

 

 

 

26 25

 

 

 

21 20

16 15 14 13 12

 

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OPCODE

 

 

RA

 

 

RB

 

 

 

 

 

 

 

 

 

DISP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HINT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STALL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FM-05656.AI4

Table 6–5describes the HW_RET instruction fields.

Table 6–5 HW_RET Instruction Fields Descriptions

Extent

Mnemonic

Value

Description

 

 

 

 

[31:26]

OPCODE

1E16

The opcode value.

[25:21]

RA

Register number. It should be R31.

[20:16]

RB

Target PC of the HW_RET instruction. Bit [0] of the register’s contents

 

 

 

determines the new value of PALmode.

[15:14]

HINT

00

HW_JMP — The PC is not pushed onto the prediction stack. The predicted

 

 

 

target is PC + (4*DISP[12:0]).

 

 

01

HW_JSR — The PC is pushed onto the prediction stack. The predicted

 

 

 

target is PC + (4*DISP[12:0]).

 

 

10

HW_RET — The prediction is popped off the stack and used as the target.

 

 

11

HW_COROUTINE — The prediction is popped off the stack and used as

 

 

 

the target. The PC is pushed onto the stack.

[13]

STALL

If set, the fetcher is stalled until the HW_RET instruction is retired or

 

 

 

aborted. The 21264/EV68A will:

 

 

 

Force a mispredict

 

 

 

Kill instructions that were fetched beyond the HW_RET instruction

 

 

 

Refetch the target of the HW_RET instruction

 

 

 

Stall until the HW_RET instruction is retired or aborted

 

 

 

If instructions beyond the HW_RET have been issued out of order, they

 

 

 

will be killed and refetched.

[12:0]

DISP

Holds a 13-bit signed longword displacement.

 

 

 

 

6.4.4 HW_MFPR and HW_MTPR Instructions

The HW_MFPR and HW_MTPR instructions are used to access internal processor reg- isters. The HW_MFPR instruction reads the value from the specified IPR into the inte- ger register specified by the RA field of the instruction. The HW_MTPR instruction writes the value from the integer GPR, specified by the RB field of the instruction, into the specified IPR. Figure 6–4shows the HW_MFPR and HW_MTPR instructions for- mat.

Figure 6–4 HW_MFPR and HW_MTPR Instructions Format

31

26 25

21 20

16 15

8

7

0

OPCODE

RA

RB

INDEX

SCBD_MASK

FM-05657.AI4

6–6

Privileged Architecture Library Code

21264/EV68A Hardware Reference Manual

Page 190
Image 190
Compaq EV68A specifications Hwmfpr and Hwmtpr Instructions, 5describes the Hwret instruction fields, Hint, Stall