Compaq EV68A specifications Ieee 1149.1 Port, Ieee 1149.1 Instructions and Opcodes

IEEE 1149.1 Port

On the receive side, while in native mode, any transition on the Ibox I_CTL

[SL_RCV], driven from the SromData_H pin, results in a trap to the PALcode inter- rupt handler. When in PALmode, all interrupts are blocked. The interrupt routine then begins sampling I_CTL [SL_RCV] under a software timing loop to input as much data as needed, using the chosen serial line protocol.

11.3 IEEE 1149.1 Port

The IEEE 1149.1 Test Access Port consists of the Tdi_H, Tdo_H, Tms_H, Tck_H, and Trst_L pins. These pins access the IEEE 1149.1 mandated public test features as well as several private chip manufacturing test features.

The port meets all requirements of the standard except that there are no pull-ups on the Tdi_H, Tms_H, and Trst_L pins, as required by the present standard.

The scope of 1149.1 compliant features on the 21264/EV68A is limited to the board level assembly verification test. The systems that do not intend to drive this port must terminate the port pins as follows: pull-ups on Tdi_H and Tms_H, pull-downs on Tck_H and Trst_L.

The port logic consists of the usual standard compliant components, namely, the TAP Controller State Machine, the Instruction Register, and the Bypass Register.

The Bypass Register provides a short shift path through the chip’s IEEE 1149.1 logic. It is generally useful at the board level testing. It consists of a 1-bit shift register.

The Instruction Register holds test instructions. On the 21264/EV68A, this register is 5 bits wide. Table 11–2describes the supported instructions. The instruction set supports several public and private instructions. The public instructions operate and produce behavior compliant with the standard. The private instructions are used for chip manu- facturing test and must not be used outside of chip manufacturing.

Table 11–2 IEEE 1149.1 Instructions and Opcodes

Opcode	Instruction	Operation/Function
00xxx	Private	These instructions are for factory test use only. The user must
01xxx		not load them as they may have a harmful effect on the
10xxx		21264/EV68A.
11000	SAMPLE	IEEE 1149.1 SAMPLE instruction.
11001	HIGHZ	IEEE 1149.1 HIGHZ instruction.
11010	CLAMP	IEEE 1149.1 CLAMP instruction.
11011	EXTEST	IEEE 1149.1 EXTEST instruction.
11100	Private	These instructions are for factory test use only. The user must
11101		not load them as they may have a harmful effect on the
11110		21264/EV68A.
11111	BYPASS	IEEE 1149.1 BYPASS instruction.

Figure 11–3shows the TAP controller state machine state diagram. The signal Tms_H controls the state transitions that occur with the rising clock edge. TAP state machine states are decoded and used for initiating various actions for testing.

21264/EV68A Hardware Reference Manual Testability and Diagnostics 11–3