8–8 Error Detection and Error Handling
21264/EV68A Hardware Reference Manual
Memory/SystemPort Single-Bit Data Correctable ECC Error
•Amachine check (MCHK) is posted and taken immediately.The PALcode machine
check handlerperfo rms a scrubbing operation as described in Section D.36 to
ensure thatthe origination point of the error is corrected.
Note: Also, a corrected read data (CRD) error is posted, when enabled, in case
thise rroris in a speculative path and the MCHK is removed. The CRD
error PALcoderead s the status to detect this condition and scrubs the block.
In the normalMCHK flow, the PALcode clearsthe pending CRD error.
8.10.2 Dcache Fill from Memory
If thequadword in error i s not used to satisfy a load instruction, no hardware
recoveryflow is invoked. The quadword in error, and itsa ssociatedcheck bits, are writ-
teninto the Dcache. However, status is logged as shown in thebulleted list below and a
corrected read data (CRD) error interrupt is posted, when enabled. PALcode may
chooseto correctt he error by scrubbing the block. If the error is not correctedby PAL-
code at the time, the error will be detected and corrected by a load/victim operation.
If thequadword in error i s used to satisfy a load instruction, then the flow is very simi-
lar to thatused for a Dcache ECC error:
•The loadinstruction’s destination register is writtenwith incorrect data; however,
the loadqueue will retain the state associated with the load instruction.
•A consumer of the load instruction’sdata may be issued before the error is
recognized; however,the Ibox will invoke a replay trapat an instruction that is
olderthan (orequal to) any instruction that consumes the load instruction’s data.
The Ibox stalls the replayed Istream in the map stage of the pipe line until the error
is corrected.
•Witha READ_ERR read type from the Mbox for the load instruction in error, the
Cbox scrubs theblock in the Dcache by evicting the block into the victim buffer
and writingit back into the Dcache.
•C_STAT[DSTREAM_MEM_ERR]is set.
•C_ADDR containsbits [42:6] of the system memory fill address of the block that
contains thee rror.
•C_SYNDROME_0[7:0]a nd C_SYNDROME_1[7:0] contain the syndrome of
quadword0 and 1, respectively, of the octawordsubblock that contains the error.
•The loadqueue retries the load instruction and rewrites theregister.
•DC_STAT[ECC_ERR_LD]is set.
•A correctedread data (CRD) error interrupt is posted, when enabled.
Note: Errorsin speculative load instructions cause a CRD error to be posted but
the datais not scrubbed by hardware. The PALcode cannot scrubthe data
becauseC _STAT is zero,and C_ADDR does not have the address of the
block with theerror.