21264/EV68A Hardware Reference Manual
ElectricalData 9–3
DC Characteristics
Note: Currentout of a 21264/EV68A pin is represented by a – symbol while a +
symbolindicates current flowing into a 21264/EV68A pin.
Table 9–3 VDD (I_DC _POWER)
ParameterSymbol Description TestConditions Minimum Maximum
VDD Processorcore supply voltage 1.6V 1.7V
Power(sleep) Processor power required (sleep) @ VDD = 1.7 V
Note3 —12W
1
1Powermeasured at 37.5 MHz while running the “Ebox aliveness test.”
PLL_VDD PLLsupply voltage 2.45V 2.55V
PLL_IDD PLLsupply current (running) Freq = 940 MHz 25mA
Table 9–4 Input DC Reference Pin (I_DC_REF)
Parameter
Symbol Description TestConditions Minimum Maximum
VREF DCinput reference voltage 600 mV VDD– 100 mV
|I
I| Inputcurrent VSS VVDD 150µA
Table 9–5 Input Differential Ampli fierRecei ver (I_DA)
Parameter
Symbol Description TestConditions Minimum Maximum
VIL Low-levelinput voltage Note5 VREF – 200 mV
VIH High-levelinput voltage VREF + 200 mV
|I
I| Inputcurrent VSS VVDD 150µA
CIN Input-pincapacitance Freq=10 MHz 5.7 pF
Note6
Table 9–6 Input Differential Amplifier Clock Receiver (I_DA_CL K)
Parameter
Symbol Description TestConditions Minimum Maximum
Vdiff Differentialinput voltage 200mv Note 1
|VBIAS| Open-circuitdifferential I ≤± 1 µA
Note2 —50mV
|I
I| Inputcurrent VSS VVDD 150 µA
CIN Input-pincapacitance Freq=10 MHz 5.0 pF
Note6