Compaq EV68A specifications Programming INVALTODIRTYENABLE10

System Port

Table 4–14footnotes:

1.Systems can optionally enable MB instructions to the external system by asserting Cbox CSR SYSBUS_MB_ENABLE. This mode is described in Section 2.12.1.

2.To minimize load-to-use memory latency, systems can optionally enable specula- tive transactions to memory space by asserting the Cbox CSR SPEC_READ_ENABLE[0]. If the Cbox system command queue is empty, a bypass between the Bcache interface and the system interface is enabled (in combi- nation with this mode). When the next new transaction is delivered by the Mbox, the Cbox starts MAF memory references to the system interface before the results of Bcache hit is known. The RV bit is deasserted on a Bcache hit, or in BC_RDVICTIM[0] mode (see footnote 3, below), and for Bcache miss transactions that generate a victim (clean or dirty). Otherwise, the RV bit is asserted.

3.Systems can optionally enable RdBlkVic, RdBlkModVic, and InvalToDirtyVic commands using Cbox CSR BC_RDVICTIM[0]. In this mode of operation RdBlkxVic command cycles are always followed immediately by the WrVictimBlk commands. Also, when CleanVictimBlk commands are enabled, they immediately follow RdBlkVic, RdBlkModVic, and InvalToDirtyVic commands.

4.Systems can optionally enable Evict commands by asserting the Cbox CSR ENABLE_EVICT. In this mode, all ECB instructions will generate an Evict com- mand, and in combination with BC_RDVICTIM[0] mode, the WriteVictim or CleanVictim (when Cbox CSR BC_CLEAN_VICTIM[0] is asserted) is associated with the Evict command is atomically sent after the Evict command.

5.Optionally, systems can enable InvalToDirty commands by programming Cbox CSR INVAL_TO_DIRTY_ENABLE[1:0]. Table 4–15shows how to program INVAL_TO_DIRTY_ENABLE[1:0].

6.Optionally, systems can enable CleanToDirty or SharedToDirty commands by using Cbox CSR SET_DIRTY_ENABLE[2:0]. These three bits control the Cbox action upon a block that was hit in the Dcache with a status of dirty/shared, clean/ shared, or clean respectively.

Table 4–15 Programming INVAL_TO_DIRTY_ENABLE[1:0]

INVAL_TO_DIRTY_ENABLE[1:0]	Cbox Action
X0	WH64 instructions are converted to RdModx commands at the interface.
	Beyond this point, no other agent sees the WH64 instruction. This mode is
	useful for microprocessors that do not want to support InvalToDirty transac-
	tions.
01	WH64 instructions are enabled, but they are acknowledged within the
	21264/EV68A.
11	WH64 instructions are enabled, and generate InvalToDirty transactions at
	the 21264/EV68A pins.

21264/EV68A Hardware Reference Manual Cache and External Interfaces 4–23