Maxim DS33R11 Register Address Map, Mapper Chip Global Arbiter Bert Serial Ethernet, Interfac

DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

11 DEVICE REGISTERS

Ten address lines are used to address the register space. Table 11-1 shows the register map for the DS33R11. The addressable range for the device is 0000h to 08FFh. Each Register Section is 64 bytes deep. Global Registers are preserved for software compatibility with multiport devices. The Serial Interface (Line) Registers are used to configure the serial port and the associated transport protocol. The Ethernet Interface (Subscriber) registers are used to control and observe each of the Ethernet ports. The registers associated with the MAC must be configured through indirect register write /read access due to the architecture of the device.

When writing to a register input values for unused bits and registers (those designated with “-“) should be zero, as these bits and registers are reserved. When a register is read from, the values of the unused bits and registers should be ignored. A latched status bit is set when an event happens and is cleared when read. The register details are provided in the following tables.

Table 11-1. Register Address Map

MAPPER/	CHIP	GLOBAL	ARBITER	BERT	SERIAL	ETHERNET	T1/E1/J1
					INTERFAC
PORT	SELECT	REGISTERS				INTERFACE	TRANSCEIVER
					E
Ethernet	CS=0,	0000h–	0040h–	0080h–	00C0h–	0140h– 17Fh	—
Mapper	CST=1	003Fh	007Fh	00BFh	013Fh
T1/E1/J1	CS=1,	—	—	—	—	—	000h–0FFh
Port 1	CST=0

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