Maxim DS33R11 specifications TR.SR2, 18h, Ryelc RUA1C Frclc Rlosc

DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

Register Name:		TR.SR2
Register Description:		Status Register 2
Register Address:		18h
Bit #	7	6	5	4	3	2	1	0
Name	RYELC	RUA1C	FRCLC	RLOSC	RYEL	RUA1	FRCL	RLOS
Default	0	0	0	0	0	0	0	0

Bit 7: Receive Yellow Alarm Clear Event (RYELC) (T1 Only). Set when the receive Yellow Alarm condition is no longer detected.

Bit 6: Receive Unframed All-Ones Clear Event (RUA1C). Set when the unframed all 1s condition is no longer detected.

Bit 5: Framer Receive Carrier-Loss Clear Event (FRCLC). Set when the carrier loss condition at RPOSI and RNEGI is no longer detected.

Bit 4: Receive Loss-of-Sync Clear Event (RLOSC). Set when the framer achieves synchronization; remains set until read.

Bit 3: Receive Yellow Alarm Condition (RYEL) (T1 Only). Set when a Yellow Alarm is received at RPOSI and

RNEGI.

Bit 2: Receive Unframed All-Ones (T1 Blue Alarm, E1 AIS) Condition (RUA1). Set when an unframed all 1s code is received at RPOSI and RNEGI.

Bit 1: Framer Receive Carrier-Loss Condition (FRCL). Set when 255 (or 2048 if TR.E1RCR2.0 = 1) E1 mode or 192 T1 mode consecutive 0s have been detected at RPOSI and RNEGI.

Bit 0: Receive Loss-of-Sync Condition (RLOS). Set when the transceiver is not synchronized to the received data stream.

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