Maxim DS33R11 specifications TR.TCD1, TR.TCD2, Transmit Code Definition Register, B8h

	DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
Register Name:	TR.TCD1
Register Description:	Transmit Code-Definition Register 1
Register Address:	B7h

Bit #

Name

Default

7	6	5	4	3	2	1	0
C7	C6	C5	C4	C3	C2	C1	C0
0	0	0	0	0	0	0	0

Bit 7: Transmit Code-Definition Bit 7 (C7). First bit of the repeating pattern.

Bits 3 – 6: Transmit Code-Definition Bits 3–6 (C3–C6)

Bit 2: Transmit Code-Definition Bit 2 (C2). A don’t care if a 5-bit length is selected.

Bit 1: Transmit Code-Definition Bit 1 (C1). A don’t care if a 5-bit or 6-bit length is selected.

Bit 0: Transmit Code-Definition Bit 0 (C0). A don’t care if a 5-, 6-, or 7-bit length is selected.

Register Name:	TR.TCD2
Register Description:	Transmit Code Definition Register 2
Register Address:	B8h

Bit #

Name

Default

7	6	5	4	3	2	1	0
C7	C6	C5	C4	C3	C2	C1	C0
0	0	0	0	0	0	0	0

Least significant byte of 16 bit code.

Bits 0 – 7: Transmit Code-Definition Bits 0–7 (C0–C7). A don’t care if a 5-,6-, or 7-bit length is selected.

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