Maxim DS33R11 specifications TR.H1TF, TR.H2TF, TR.H1RF, TR.H2RF

DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

Register Name:		TR.H1TF, TR.H2TF
Register Description:		HDLC # 1 Transmit FIFO
Register Address:		HDLC # 2 Transmit FIFO
		9Dh, ADh
Bit #	7	6	5	4	3	2	1	0
Name	THD7	THD6	THD5	THD4	THD3	THD2	THD1	THD0
Default	0	0	0	0	0	0	0	0

Bit 7: Transmit HDLC Data Bit 7 (THD7). MSB of an HDLC packet data byte.

Bit 6: Transmit HDLC Data Bit 6 (THD6)

Bit 5: Transmit HDLC Data Bit 5 (THD5)

Bit 4: Transmit HDLC Data Bit 4 (THD4)

Bit 3: Transmit HDLC Data Bit 3 (THD3)

Bit 2: Transmit HDLC Data Bit 2 (THD2)

Bit 1: Transmit HDLC Data Bit 1 (THD1)

Bit 0: Transmit HDLC Data Bit 0 (THD0). LSB of an HDLC packet data byte.

Register Name:		TR.H1RF, TR.H2RF
Register Description:		HDLC # 1 Receive FIFO
Register Address:		HDLC # 2 Receive FIFO
		9Eh, AEh
Bit #	7	6	5	4	3	2	1	0
Name	RHD7	RHD6	RHD5	RHD4	RHD3	RHD2	RHD1	RHD0
Default	0	0	0	0	0	0	0	0

Bit 7: Receive HDLC Data Bit 7 (RHD7). MSB of an HDLC packet data byte.

Bit 6: Receive HDLC Data Bit 6 (RHD6)

Bit 5: Receive HDLC Data Bit 5 (RHD5)

Bit 4: Receive HDLC Data Bit 4 (RHD4)

Bit 3: Receive HDLC Data Bit 3 (RHD3)

Bit 2: Receive HDLC Data Bit 2 (RHD2)

Bit 1: Receive HDLC Data Bit 1 (RHD1)

Bit 0: Receive HDLC Data Bit 0 (RHD0). LSB of an HDLC packet data byte.

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