DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

Register Name:

TR.H1TC, TR.H2TC

Register Description:

HDLC #1 Transmit Control

Register Address:

HDLC #2 Transmit Control

90h, A0h

Bit #

Name

Default

7

6

5

4

3

2

1

0

NOFS

TEOML

THR

THMS

TFS

TEOM

TZSD

TCRCD

0

0

0

0

0

0

0

0

Bit 7: Number of Flags Select (NOFS)

0 = send one flag between consecutive messages

1 = send two flags between consecutive messages

Bit 6: Transmit End of Message and Loop (TEOML). To loop on a message, this bit should be set to a 1 just before the last data byte of an HDLC packet is written into the transmit FIFO. The message repeats until the user clears this bit or a new message is written to the transmit FIFO. If the host clears the bit, the looping message completes, then flags are transmitted until a new message is written to the FIFO. If the host terminates the loop by writing a new message to the FIFO, the loop terminates, one or two flags are transmitted, and the new message starts. If not disabled through TCRCD, the transmitter automatically appends a 2-byte CRC code to the end of all messages. This is useful for transmitting consecutive SS7 FISUs without host intervention.

Bit 5: Transmit HDLC Reset (THR). Resets the transmit HDLC controller and flushes the transmit FIFO. An abort followed by 7Eh or FFh flags/idle is transmitted until a new packet is initiated by writing new data into the FIFO. Must be cleared and set again for a subsequent reset.

0 = normal operation

1 = reset transmit HDLC controller and flush the transmit FIFO

Bit 4: Transmit HDLC Mapping Select (THMS) 0 = transmit HDLC assigned to channels

1 = transmit HDLC assigned to FDL (T1 mode), Sa bits (E1 mode)

Bit 3: Transmit Flag/Idle Select (TFS). This bit selects the intermessage fill character after the closing and before the opening flags (7Eh).

0 = 7Eh

1 = FFh

Bit 2: Transmit End of Message (TEOM). Should be set to a 1 just before the last data byte of an HDLC packet is written into the transmit FIFO at HxTF. If not disabled through TCRCD, the transmitter automatically appends a 2- byte CRC code to the end of the message.

Bit 1: Transmit Zero-Stuffer Defeat (TZSD). The zero-stuffer function automatically inserts a 0 in the message field (between the flags) after five consecutive 1s to prevent the emulation of a flag or abort sequence by the data pattern. The receiver automatically removes (destuffs) any 0 after five 1s in the message field.

0 = enable the zero stuffer (normal operation)

1 = disable the zero stuffer

Bit 0: Transmit CRC Defeat (TCRCD). A 2-byte CRC code is automatically appended to the outbound message. This bit can be used to disable the CRC function.

0 = enable CRC generation (normal operation)

1 = disable CRC generation

265 of 344

Page 265
Image 265
Maxim DS33R11 specifications TR.H1TC, TR.H2TC, Hdlc #1 Transmit Control, Hdlc #2 Transmit Control, 90h, A0h