DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

Register Name:

TR.PCLR1

Register Description:

Per-Channel Loopback Enable Register 1

Register Address:

4Bh

Bit #

Name

Default

7

6

5

4

3

2

1

0

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

0

0

0

0

0

0

0

0

Bits 0 – 7: Per-Channel Loopback Enable for Channels 1 to 8 (CH1 to CH8) 0 = loopback disabled

1 = enable loopback; source data from the corresponding receive channel

Register Name:

TR.PCLR2

Register Description:

Per-Channel Loopback Enable Register 2

Register Address:

4Ch

Bit #

Name

Default

7

6

5

4

3

2

1

0

CH16

CH15

CH14

CH13

CH12

CH11

CH10

CH9

0

0

0

0

0

0

0

0

Bits 0 – 7: Per-Channel Loopback Enable for Channels 9 to 16 (CH9 to CH16) 0 = loopback disabled

1 = enable loopback; source data from the corresponding receive channel

Register Name:

TR.PCLR3

Register Description:

Per-Channel Loopback Enable Register 3

Register Address:

4Dh

Bit #

Name

Default

7

6

5

4

3

2

1

0

CH24

CH23

CH22

CH21

CH20

CH19

CH18

CH17

0

0

0

0

0

0

0

0

Bits 0 – 7: Per-Channel Loopback Enable for Channels 17 to 24 (CH17 to CH24) 0 = loopback disabled

1 = enable loopback; source data from the corresponding receive channel

Register Name:

TR.PCLR4

Register Description:

Per-Channel Loopback Enable Register 4

Register Address:

4Eh

Bit #

Name

Default

7

6

5

4

3

2

1

0

CH32

CH31

CH30

CH29

CH28

CH27

CH26

CH25

0

0

0

0

0

0

0

0

Bits 0 – 7: Per-Channel Loopback Enable for Channels 25 to 32 (CH25 to CH32) 0 = loopback disabled

1 = enable loopback; source data from the corresponding receive channel

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Maxim DS33R11 specifications TR.PCLR1, TR.PCLR2, TR.PCLR3, TR.PCLR4