DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

Register Name:

TR.SR4

 

 

 

 

 

 

Register Description:

Status Register 4

 

 

 

 

 

Register Address:

1Ch

 

 

 

 

 

 

Bit #

7

6

5

4

3

2

1

0

Name

RAIS-CI

RSAO

RSAZ

TMF

TAF

RMF

RCMF

RAF

Default

0

0

0

0

0

0

0

0

Bit 7: Receive AIS-CI Event (RAIS-CI) (T1 Only). Set when the receiver detects the AIS-CI pattern as defined in ANSI T1.403.

Bit 6: Receive Signaling All-Ones Event (RSAO) (E1 Only). Set when the contents of time slot 16 contains fewer than three 0s over 16 consecutive frames. This alarm is not disabled in the CCS signaling mode.

Bit 5: Receive Signaling All-Zeros Event (RSAZ) (E1 Only). Set when over a full MF, time slot 16 contains all 0s.

Bit 4: Transmit Multiframe Event (TMF)

E1 Mode: Set every 2ms (regardless if CRC4 is enabled) on transmit multiframe boundaries. Used to alert the host that signaling data needs to be updated.

T1 Mode: Set every 1.5ms on D4 MF boundaries or every 3ms on ESF MF boundaries.

Bit 3: Transmit Align Frame Event (TAF) (E1 Only). Set every 250μs at the beginning of align frames. Used to alert the host that the TR.TAF and TR.TNAF registers need to be updated.

Bit 2: Receive Multiframe Event (RMF)

E1 Mode: Set every 2ms (regardless if CAS signaling is enabled or not) on receive multiframe boundaries. Used to alert the host that signaling data is available.

T1 Mode: Set every 1.5ms on D4 MF boundaries or every 3ms on ESF MF boundaries.

Bit 1: Receive CRC4 Multiframe Event (RCMF) (E1 Only). Set on CRC4 multiframe boundaries; continues to set every 2ms on an arbitrary boundary if CRC4 is disabled.

Bit 0: Receive Align Frame Event (RAF) (E1 Only). Set every 250μs at the beginning of align frames. Used to alert the host that Si and Sa bits are available in the TR.RAF and TR.RNAF registers.

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Maxim DS33R11 specifications TR.SR4, 1Ch, RAIS-CI Rsao Rsaz TMF TAF RMF Rcmf RAF, Bit 2 Receive Multiframe Event RMF