Maxim DS33R11 Committed Information Rate CIR Controller, Sdram Interface, MAC Interface

DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

2.5Additional HDLC Controllers in the Integrated T1/E1/J1 Transceiver

•Two additional independent HDLC controllers

•Fast load and unload features for FIFOs

•SS7 support for FISU transmit and receive

•Independent 128-byte Rx and Tx buffers with interrupt support

•Access FDL, Sa, or single/multiple DS0 channels

•DS0 access includes Nx64 or Nx56

•Compatible with polled or interrupt driven environments

•Bit-oriented code (BOC) support

2.6Committed Information Rate (CIR) Controller

•CIR Rate controller limits transmission of data from the Ethernet interface to the serial interface

•CIR granularity at 512kbit/s

•CIR averaging for smoothing traffic peaks

2.7SDRAM Interface

•Interface for 128Mb, 32-bit-wide SDRAM

•SDRAM Interface speed up to 100MHz

•Auto refresh timing

•Automatic precharge

•Master clock provided to the SDRAM

•No external components required for SDRAM connectivity

2.8MAC Interface

•MAC port with standard MII (less TX_ER) or RMII

•10Mbps and 100Mbps Data rates

•Configurable DTE or DCE modes

•Facilitates auto-negotiation by host microprocessor

•Programmable half and full-duplex modes

•Flow control for both half-duplex (back-pressure) and full-duplex (PAUSE) modes

•Programmable Maximum MAC frame size up to 2016 bytes

•Minimum MAC frame size: 64 bytes

•Discards frames greater than programmed maximum MAC frame size and runt, nonoctet bounded, or bad-FCS frames upon reception

•Configurable for promiscuous broadcast-discard mode.

•Programmable threshold for SDRAM queues to initiate flow control and status indication

•MAC loopback support for transmit data looped to receive data at the MII/RMII interface

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