Maxim DS33R11 Ethernet Interface Registers, Ethernet Interface Register Bit Descriptions

DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

11.6 Ethernet Interface Registers

The Ethernet Interface registers are used to configure RMII/MII bus operation and establish the MAC parameters as required by the user. The MAC Registers cannot be addressed directly from the Processor port. The registers below are used to perform indirect read or write operations to the MAC registers. The MAC Status Registers are shown in Table 11-7. Accessing the MAC Registers is described in the Section 9.15.

11.6.1 Ethernet Interface Register Bit Descriptions

Register Name:		SU.MACRADL
Register Description:		MAC Read Address Low Register
Register Address:		140h
Bit #	7	6	5	4	3	2	1	0
Name	MACRA7	MACRA6	MACRA5	MACRA4	MACRA3	MACRA2	MACRA1	MACRA0
Default	0	0	0	0	0	0	0	0

Bits 0 – 7: MAC Read Address (MACRA0-7)Low byte of the MAC indirect register address. Used only for read operations.

Register Name:		SU.MACRADH
Register Description:		MAC Read Address High Register
Register Address:		141h
Bit #	7	6	5	4	3	2	1	0
Name	MACRA1	MACRA1	MACRA1	MACRA1	MACRA1	MACRA1	MACRA9	MACRA8
Default	5	4	3	2	1	0
	0	0	0	0	0	0	0	0

Bits 0 – 7: MAC Read Address (MACRA8-15)High byte of the MAC indirect register address. Used only for read operations.

Register Name:		SU.MACRD0
Register Description:		MAC Read Data Byte 0
Register Address:		142h
Bit #	7	6	5	4	3	2	1	0
Name	MACRD7	MACRD6	MACRD5	MACRD4	MACRD3	MACRD2	MACRD1	MACRD0
Default	0	0	0	0	0	0	0	0

Bits 0 – 7: MAC Read Data 0 (MACRD0-7)One of four bytes of data read from the MAC. Valid after a read command has been issued and the SU.MACRWC.MCS bit is zero.

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