Maxim DS33R11 specifications TR.E1TCR1

	DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
Register Name:	TR.E1TCR1
Register Description:	E1 Transmit Control Register 1
Register Address:	35h

Bit #

Name

Default

7	6	5	4	3	2	1	0
TFPT	T16S	TUA1	TSiS	TSA1	THDB3	TG802	TCRC4
0	0	0	0	0	0	0	0

Bit 7: Transmit Time Slot 0 Pass-Through (TFPT)

0 = FAS bits/Sa bits/remote alarm sourced internally from the TR.TAF and TR.TNAF registers 1 = FAS bits/Sa bits/remote alarm sourced from TSERI

Bit 6: Transmit Time Slot 16 Data Select (T16S)

0 = time slot 16 determined by the TR.SSIEx registers and the THSCS function in the TR.PCPR register 1 = source time slot 16 from TR.TS1 to TR.TS16 registers

Bit 5: Transmit Unframed All Ones (TUA1) 0 = transmit data normally

1 = transmit an unframed all-ones code at TPOSO and TNEGO

Bit 4: Transmit International Bit Select (TSiS) 0 = sample Si bits at TSERI pin

1 = source Si bits from TR.TAF and TR.TNAF registers (in this mode, TR.E1TCR1.7 must be set to 0)

Bit 3: Transmit Signaling All Ones (TSA1) 0 = normal operation

1 = force time slot 16 in every frame to all ones

Bit 2: Transmit HDB3 Enable (THDB3)

0 = HDB3 disabled

1 = HDB3 enabled

Bit 1: Transmit G.802 Enable (TG802). See Section 10.10 for details. 0 = do not force TCHBLK high during bit 1 of time slot 26

1 = force TCHBLK high during bit 1 of time slot 26

Bit 0: Transmit CRC4 Enable (TCRC4)

0 = CRC4 disabled

1 = CRC4 enabled

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