DS33R11

Ethernet Mapper with Integrated

T1/E1/J1 Transceiver

www.maxim-ic.com

GENERAL DESCRIPTION

The DS33R11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 (LAPS) for transmission over a T1/E1/J1 data stream.

The device performs store-and-forward of packets with full wire-speed transport capability. The built-in Committed Information Rate (CIR) Controller provides fractional bandwidth allocation up to the line rate in increments of 512kbps. The DS33R11 can operate with an inexpensive external processor.

APPLICATIONS

Transparent LAN Service

LAN Extension

Ethernet Delivery Over T1/E1/J1

FUNCTIONAL DIAGRAM

SERIAL STREAM

T1/E1/J1

T1/E1

TRANSCEIVER

LINE

 

BERT

 

 

HDLC/X.86

 

μC

 

 

MAPPER

 

SDRAM

 

 

10/100

MII/RMII

10/100

MAC

 

ETHERNET

 

DS33R11

PHY

 

 

FEATURES

10/100 IEEE 802.3 Ethernet MAC (MII and RMII) Half/Full Duplex with Automatic Flow Control

Integrated T1/E1/J1 Framer and LIU

HDLC/LAPS Encapsulation with Programmable FCS and Interframe Fill

Committed Information Rate Controller Provides Fractional Allocations in 512kbps Increments

Programmable BERT for Serial (TDM) Interface

External 16MB, 100MHz SDRAM Buffering Parallel Microprocessor Interface

1.8V, 3.3V Supplies

Reference Design Routes on Two Signal Layers

IEEE 1149.1 JTAG Support

Features continued on page 11.

ORDERING INFORMATION

PART

TEMP RANGE

PIN-PACKAGE

 

 

 

DS33R11

-40°C to +85°C

256 BGA

 

 

 

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device

may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

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Maxim DS33R11 specifications Part Temp Range PIN-PACKAGE