Intel IXF1104 LED Interface Signal Descriptions, JTAG Interface Signal Descriptions, Datasheet

IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 11. LED Interface Signal Descriptions

Signal Name	Ball	Type	Standard	Description
	Designator
LED_CLK	K24	Output	2.5 V	LED_CLK is the clock output for the LED block.
			CMOS
LED_DATA	M22	Output	2.5 V	LED_DATA is the data output for the LED block.
			CMOS
LED_LATCH	L22	Output	2.5 V	LED_LATCH is the latch enable for the LED block.
			CMOS

Table 12. JTAG Interface Signal Descriptions

Signal Name	Ball	Type	Standard	Description
	Designator
TCLK	J22	Input	2.5 V	JTAG Test Clock
			CMOS
TMS	H22	Input	2.5 V	Test Mode Select
			CMOS
TDI	J24	Input	2.5 V	Test Data Input
			CMOS
TDO	H24	Output	2.5 V	Test Data Output
			CMOS
TRST_L	J23	Input	2.5 V	Test Reset; reset input for JTAG test
			CMOS

Table 13. System Interface Signal Descriptions

Signal Name	Ball	Type	Standard	Description
	Designator
CLK125	AD19	Input	2.5 V	CLK125 is the input clock to PLL; 125 MHz +/-
			CMOS	50 ppm
SYS_RES_L	AD12	Input	2.5 V	SYS_RES_L is the system hard reset (active Low).
			CMOS

54 Datasheet

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004