Intel IXF1104 manual JTAG ID $0x50C, Datasheet

IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 112. JTAG ID ($0x50C)

Bit	Name	Description	Type1	Default
Register Description: The value of this register follows the same scheme as the device
identification register found in the IEEE 1149.1 specification. The upper four bits correspond to
silicon stepping. The next 16 bits store a Part ID Number. The next 11 bits contain a JEDEC				0x10450013
manufacturer ID. Bit zero = 1 if the chip is the first in a stack. The encoding scheme used for
the Product ID field is implementation-dependent.
31:28	Version	Version	RO	00012
27:12	Part ID	Part ID	RO	0000010001
				010000
11:8	JEDEC Continuation	JEDEC Continuation Characters	RO	0000
	Characters
7:1	JEDEC ID	JEDEC ID	RO	0001001
0	Fixed	Fixed	RO	1

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

2. These bits vary with stepping.

Datasheet 191

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004