IXF1104
Table 144. Autoscan PHY Address Enable ($0x682)
Bit | Name | Description | Type1 | Default | ||
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Register Description: Defines valid PHY addresses. Each bit enables the corresponding |
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PHY address. |
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0 = Disable the PHY address |
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| 0x00000000 | ||
1 = Enable the PHY address |
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NOTE: Autoscan is only applicable for the ports in copper mode. |
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31:4 | Reserved | Reserved | RO | 0x0000000 | ||
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| Autoscan PHY | Autoscan PHY address enable |
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3:0 | 0 = | Disable address | R/W | 1111 | ||
Address | ||||||
| 1 = | Enable address |
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1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write
Table 145. MDIO Control ($0x683)
Bit | Name | Description | Type1 | Default | ||
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Register Description: Miscellaneous control bits. |
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31:4 | Reserved | Reserved | RO | 0x000 | ||
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| MDIO progress. This bit reflects the status of |
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3 | MDIO in Progress | MDIO transaction | RO | 0 | ||
0 = MDIO Single command not in progress | ||||||
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| 1 = MDIO Single Command in progress |
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| MDIO in Progress | Enables the MDIO in progress bit |
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2 | 0 = Disable MDIO in progress register bit | R/W | 0 | |||
Enable | ||||||
| 1 = Enable MDIO in progress register bit |
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| Autoscan enable |
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1 | Autoscan Enable | 0 = | Disable Autoscan | R/W | 0 | |
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| 1 = | Enable Autoscan |
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| MDC speed |
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0 | MDC Speed | 0 = MDC runs at 2.5 MHz | R/W | 0 | ||
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| 1 = MDC runs at 18 MHz |
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1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write
Datasheet | 211 |
Document Number: 278757
Revision Number: 007
Revision Date: March 25, 2004