Intel IXF1104 manual 7.7Optical Module and I2C AC Timing Specification, 7.7.1I2C Interface Timing

IXF1104 4-Port Gigabit Ethernet Media Access Controller

7.7Optical Module and I2C AC Timing Specification

7.7.1I2C Interface Timing

Figure 45 and Figure 46 illustrate bus timing and write cycle, and Table 53 shows the I2C Interface AC timing characteristics.

Figure 45. Bus Timing Diagram

		tF	tHIGH		t
					R
I2C_Clk		tLOW		tLOW
t	HD.STA	t	t	t	tSU.STO
		SV.SAT	HD.DAT		SU.DAT
I2C_Data In
					tBUF
			tAA		tDH
I2C_Data Out

Figure 46. Write Cycle Diagram

I2C_Clk
I2C_Data	8th	ACK
	BIT
	WORD n		t WR(1)
		STOP	START
		CONDITION	CONDITION

Table 53. I2C AC Timing Characteristics (Sheet 1 of 2)

Symbol	Parameter	Min	Max	Units
fSCL	Clock frequency, SCL	-	100	kHz
tLOW	Clock pulse width low	4.7		µs
tHIGH	Clock pulse width High	4.0		µs
tI	Noise suppression		100	µs
tAA	Clock low to data valid out	0.1	4.5	µs
tBUF	Time the bus must be free before a new transmission starts	4.7	-	µs
tHD.STA	Start hold time	4.0	-	µs

146 Datasheet

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004