IXF1104
Table 89. TX Config Word ($ Port_Index + 0x17) (Sheet 2 of 2)
Bit | Name | Description | Type1 | Default | ||
|
|
|
|
| ||
|
| Remote fault definitions: |
|
| ||
|
| 00 | = No error, link okay |
|
| |
13:122 | Remote Fault [1:0] | 01 | = Offline | R/W | 00 | |
|
| 10 | = Link failure |
|
| |
|
| 11 = |
|
| ||
|
|
|
|
| ||
11:9 | Reserved | Write as 0, ignore on Read | R/W | 000 | ||
|
|
|
|
| ||
8 | Asym Pause | Asym Pause. The ability to send pause frames. | R/W | 1 | ||
|
|
|
|
| ||
7 | Sym Pause | Sym Pause. The ability to send and receive pause | R/W | 1 | ||
frames. | ||||||
|
|
|
| |||
|
|
|
|
| ||
6 | Half Duplex | R/W | 1 | |||
|
|
|
|
| ||
5 | Full Duplex | R/W | 1 | |||
|
|
|
|
| ||
4:0 | Reserved | Write as 0, ignore on read | R/W | 0x00 | ||
|
|
|
|
|
| |
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write
NOTE: A value of 0x0 must be written to all reserved bits of the “TX Config Word ($ Port_Index + 0x17)” Register.
Table 90. Diverse Config Write ($ Port_Index + 0x18) (Sheet 1 of 2)
Bit | Name | Description | Type1 | Default | |
|
|
|
|
| |
Register Description: This register contains various configuration bits for general use. |
| 0x00110D | |||
|
|
|
|
| |
31:19 | Reserved | Reserved | RO | 0x0000 | |
|
|
|
|
| |
18:13 | Reserved | Write as 0, ignore on Read. | R/W | 0x0000 | |
|
|
|
|
| |
12 | Reserved2 | Write as 1, ignore on Read. | R/W | 1 | |
Reserved2 | Write as 0, ignore on Read. | R/W | 0x0 | ||
8 | Reserved2 | Write as 1, ignore on Read. | R/W | 1 | |
|
| 0 = Normal operation |
|
| |
|
| 1 = Enable padding of undersized packets |
|
| |
7 | pad_enable | NOTE: Assertion of this bit results in the | R/W | 0 | |
|
|
|
| ||
|
| automatic addition of a CRC to the |
|
| |
|
| padded packet. |
|
| |
|
|
|
|
| |
6 | crc_add | 0 = Normal operation | R/W | 0 | |
1 = Enable automatic CRC appending | |||||
|
|
|
| ||
|
|
|
|
| |
|
| Enable |
|
| |
|
| to be performed by the hardware state machines |
|
| |
|
| in the MAC. |
|
| |
5 | AN_enable | The hardware | R/W | 0 | |
machine controls the config words transmitted | |||||
|
|
|
| ||
|
| when this bit is set. |
|
| |
|
| NOTE: In copper mode, this bit must be set to 0 |
|
| |
|
| (reserved). |
|
| |
|
|
|
|
| |
42 | Reserved | Write as 0, ignore on Read. | R/W | 0 | |
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write
2. Reserved bits must be written to the default value for proper operation.
170 | Datasheet |
Document Number: 278757
Revision Number: 007
Revision Date: March 25, 2004
