Intel IXF1104 manual 8.4.3MAC TX Statistics Register Overview, Datasheet

Models: IXF1104

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8.4.3MAC TX Statistics Register Overview

IXF1104 4-Port Gigabit Ethernet Media Access Controller

8.4.3MAC TX Statistics Register Overview

The MAC TX Statistics registers contain all the MAC transmit statistic counters and are cleared when read. The software must poll these registers to accumulate values and to ensure that the counters do not wrap. The 32-bit counters wrap after approximately 30 seconds.

Table 94 covers all four MAC ports TX statistics. Port_Index is the port number (0, 1, 2, or 3).

Table 94. MAC TX Statistics ($ Port_Index +0x40 – +0x58) (Sheet 1 of 4)

Name

Description

Address

Type1

Default

 

 

 

 

 

 

Counts the bytes transmitted in all legal

 

 

 

 

frames. The count includes all bytes

 

 

 

 

from the destination MAC address to

 

 

 

 

and including the CRC. The initial

Port_Index +

 

 

OctetsTransmittedOK

preamble and SFD bytes are not

R

0x00000000

0x40

 

counted. Any initial collided

 

 

 

 

 

 

 

transmission attempts before a

 

 

 

 

successful frame transmission do not

 

 

 

 

add to this counter.

 

 

 

 

 

 

 

 

 

Counts the bytes transmitted in all bad

 

 

 

 

frames. The count includes all bytes

 

 

 

 

from the destination MAC address to

 

 

 

 

and including the CRC. The initial

 

 

 

 

preamble and SFD bytes are not

 

 

 

 

counted.

 

 

 

 

Late collision counted: The count is

 

 

 

 

close to the actual number of bytes

 

 

 

 

transmitted before the frame is

 

 

 

 

discarded.

 

 

 

 

Excessive collision counted: The count

 

 

 

OctetsTransmittedBad

is close to the actual number of bytes

Port_Index +

R

0x00000000

transmitted before the frame is

0x41

 

 

 

 

discarded.

 

 

 

 

TX under-run counted: The count is

 

 

 

 

expected to match the number of bytes

 

 

 

 

actually transmitted before the frame is

 

 

 

 

discarded.

 

 

 

 

TX CRC error counted: All bytes not

 

 

 

 

sent with success are counted by this

 

 

 

 

counter.

 

 

 

 

Any initial collided transmission

 

 

 

 

attempts before a successful frame

 

 

 

 

transmission do not add to this counter.

 

 

 

 

 

 

 

 

TxUCPkts

The total number of unicast packets

Port_Index +

R

0x00000000

transmitted (excluding bad packets).

0x42

 

 

 

 

 

 

 

 

 

The total number of multicast packets

 

 

 

 

transmitted (excluding bad packets).

 

 

 

 

NOTE: This count includes pause

 

 

 

 

control packets, which are also

 

 

 

TxMCPkts

counted in the

Port_Index +

R

0x00000000

TxPauseFrames Counter.

0x43

 

 

 

 

Thus, these types of packets

 

 

 

 

are counted twice. Take care

 

 

 

 

when summing register counts

 

 

 

 

for reporting MIB information.

 

 

 

 

 

 

 

 

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Datasheet

177

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004

Page 177
Image 177
Intel IXF1104 manual 8.4.3MAC TX Statistics Register Overview, Datasheet