IXF1104
8.4.7TX FIFO Register Overview
Table 132 through Table 139 provide an overview of the TX FIFO registers, which include the TX FIFO High and Low watermark.
Table 132. TX FIFO High Watermark Ports 0 - 3 ($0x600 – 0x603)
Name | Description | Address | Type1 | Default | |
|
|
|
|
| |
| High watermark for TX FIFO Port 0. The |
|
|
| |
| default value of 0x3E0 represents 992 |
|
|
| |
| locations. This equates to 7936 bytes of data. A |
|
|
| |
TX FIFO High | unit entry in this register equates to 8 bytes of | 0x600 | R/W | 0x000003E0 | |
data. When the amount of data stored in the TX | |||||
Watermark Port 0 | |||||
FIFO exceeds the high watermark, flow control |
|
|
| ||
| is automatically initiated on the SPI3 interface to |
|
|
| |
| request that the switch fabric stops data |
|
|
| |
| transfers to avoid an overflow condition. |
|
|
| |
|
|
|
|
| |
| High watermark for TX FIFO Port 1. The |
|
|
| |
| default value of 0x3E0 represents 992 |
|
|
| |
| locations. This equates to 7936 bytes of data. A |
|
|
| |
TX FIFO High | unit entry in this register equates to 8 bytes of |
|
|
| |
data. When the amount of data stored in the TX | 0x601 | R/W | 0x000003E0 | ||
Watermark Port 1 | |||||
FIFO exceeds the high watermark, flow control |
|
|
| ||
| is automatically initiated on the SPI3 interface to |
|
|
| |
| request that the switch fabric stops data |
|
|
| |
| transfers to avoid an overflow condition. |
|
|
| |
|
|
|
|
| |
| High watermark for TX FIFO Port 2. The |
|
|
| |
| default value of 0x3E0 represents 992 |
|
|
| |
| locations. This equates to 7936 bytes of data. A |
|
|
| |
TX FIFO High | unit entry in this register equates to 8 bytes of | 0x602 | R/W | 0x000003E0 | |
data. When the amount of data stored in the TX | |||||
Watermark Port 2 | |||||
| FIFO exceeds the high watermark, flow control |
|
|
| |
| is automatically initiated on the SPI3 interface to |
|
|
| |
| request that the switch fabric stops data |
|
|
| |
| transfers to avoid an overflow condition. |
|
|
| |
|
|
|
|
| |
| High watermark for TX FIFO Port 3. The |
|
|
| |
| default value of 0x3E0 represents 992 |
|
|
| |
| locations. This equates to 7936 bytes of data. A |
|
|
| |
TX FIFO High | unit entry in this register equates to 8 bytes of |
|
|
| |
data. When the amount of data stored in the TX | 0x603 | R/W | 0x000003E0 | ||
Watermark Port 3 | |||||
FIFO exceeds the high watermark, flow control |
|
|
| ||
| is automatically initiated on the SPI3 interface to |
|
|
| |
| request that the switch fabric stops data |
|
|
| |
| transfers to avoid an overflow condition. |
|
|
| |
|
|
|
|
|
1.RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write
202 | Datasheet |
Document Number: 278757
Revision Number: 007
Revision Date: March 25, 2004