Intel IXF1104 Collision Distance $ Port_Index +, Collision Threshold $ Port_Index +, Datasheet

IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 73. Collision Distance ($ Port_Index + 0x05)

Name	Description	Address	Type1	Default
	This is a 10-bit value that sets the limit for late
Collision	collision. Collisions happening at byte times	Port_Index	R/W	0x00000043
Distance	beyond the configured value are considered to be	+ 0x05
	late collisions. (Only valid in half-duplex).

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 74. Collision Threshold ($ Port_Index + 0x06)

Name	Description	Address	Type1	Default
	This is a 4-bit value that sets the limit for
	excessive collisions. When the number of
Collision	transmission attempts performed for a packet	Port_Index	R/W	0x0000000F
Threshold	exceeds this value, it is considered to be an	+ 0x06
	excessive collision and the frame is dropped.
	(Only valid in half-duplex).

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 75. FC TX Timer Value ($ Port_Index + 0x07)

Name	Description	Address	Type1	Default
FC TX Timer	The 16-bit pause length inserted in the flow	Port_Index
	control pause frame sent to the receiving		R/W	0x0000005E
Value		+ 0x07
	station. The value is in 512-bit times.

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 76. FD FC Address ($ Port_Index + 0x08 – + 0x09)

Name	Description	Address	Type1	Default
	The lowest 32 bits of the 48-bit globally	Port_Index
FD FC Address Low	assigned multicast pause frame destination		R/W	0xC2000001
		+ 0x08
	address.
	The highest 16 bits (47:32) of the globally
FD FC Address High	assigned multicast pause frame destination	Port_Index	R/W	0x00000180
	address. The higher 16-bit address is	+ 0x09
	derived from bits 15:0 of this register.

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Datasheet 163

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004