Intel IXF1104 manual with the“RX FIFO Errored Frame, Drop Enable $0x59F” and the “RX, 0x19”, 0x0F”

Models: IXF1104

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IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 125. RX FIFO Errored Frame Drop Counter Ports 0 - 3 ($0x5A2 - 0x5A5) (Sheet 2 of 2)

Name

Description

Address

Type

Default

 

 

 

 

 

 

This register counts all frames dropped from the

 

 

 

 

RX FIFO for port 2 by meeting one of the

 

 

 

 

following conditions:

 

 

 

 

Frames are removed in conjunction

 

 

 

 

with the“RX FIFO Errored Frame

 

 

 

RX FIFO Errored

Drop Enable ($0x59F)” and the “RX

 

 

 

Frame Drop Counter

Packet Filter Control ($ Port_Index +

0x5A4

R

0x00000000

on Port 2

0x19)”.

 

 

 

 

 

 

 

 

Frames are greater than the “Max

 

 

 

 

Frame Size (Addr: Port_Index +

 

 

 

 

0x0F)”.

 

 

 

 

This register is cleared on Read.

 

 

 

 

 

 

 

 

 

This register counts all frames dropped from the

 

 

 

 

RX FIFO for port 3 by meeting one of the

 

 

 

 

following conditions:

 

 

 

 

Frames are removed in conjunction

 

 

 

 

with the“RX FIFO Errored Frame

 

 

 

RX FIFO Errored

Drop Enable ($0x59F)” and the “RX

 

 

 

Frame Drop Counter

Packet Filter Control ($ Port_Index +

0x5A5

R

0x00000000

on Port 3

0x19)”.

 

 

 

 

 

 

 

 

Frames are greater than the “Max

 

 

 

 

Frame Size (Addr: Port_Index +

 

 

 

 

0x0F)”.

 

 

 

 

This register is cleared on Read.

 

 

 

 

 

 

 

 

1.RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 126. RX FIFO SPI3 Loopback Enable for Ports 0 - 3 ($0x5B2)

Bit

Name

Description

Type1

Default

 

 

 

 

 

Register Description: Enables the TX SPI3 port to send packets into the RX_FIFO instead of

0x00000000

into the TX FIFO, creating a SPI3 loopback.

 

 

 

 

 

 

 

 

31:12

Reserved

Reserved

RO

0x00000

 

 

 

 

 

 

11

SPI3 loopback enable

0 =

Disabled

R/W

0x0

for Port 3

1 =

Enabled

 

 

 

 

 

 

 

 

 

10

SPI3 loopback enable

0 =

Disabled

R/W

0x0

for Port 2

1 =

Enabled

 

 

 

 

 

 

 

 

 

9

SPI3 loopback enable

0 =

Disabled

R/W

0x0

for Port 1

1 =

Enabled

 

 

 

 

 

 

 

 

 

8

SPI3 loopback enable

0 =

Disabled

R/W

0x0

for Port 0

1 =

Enabled

 

 

 

 

 

 

 

 

7:0

Reserved

Write as 0, ignore on Read.

R/W

0x00

 

 

 

 

 

 

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

198

Datasheet

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004

Page 198
Image 198
Intel IXF1104 with the“RX FIFO Errored Frame, Drop Enable $0x59F” and the “RX, Packet Filter Control $ Port_Index +, 0x19”